Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
R
reform-boundary-uboot
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Container registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Service Desk
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Jack Humbert
reform-boundary-uboot
Commits
4abf2f7a
Commit
4abf2f7a
authored
14 years ago
by
Marek Vasut
Browse files
Options
Downloads
Patches
Plain Diff
PXA: Use pxa-regs.h register definitions in start.S
Signed-off-by:
Marek Vasut
<
marek.vasut@gmail.com
>
parent
6e96cf9a
Branches
Branches containing commit
Tags
Tags containing commit
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
arch/arm/cpu/pxa/start.S
+8
-12
8 additions, 12 deletions
arch/arm/cpu/pxa/start.S
with
8 additions
and
12 deletions
arch/arm/cpu/pxa/start.S
+
8
−
12
View file @
4abf2f7a
...
@@ -566,12 +566,6 @@ fiq:
...
@@ -566,12 +566,6 @@ fiq:
/*
*/
/*
*/
/****************************************************************************/
/****************************************************************************/
/*
Operating
System
Timer
*/
/*
Operating
System
Timer
*/
OSTIMER_BASE
:
.
word
0x40a00000
#define OSMR3 0x0C
#define OSCR 0x10
#define OWER 0x18
#define OIER 0x1C
.
align
5
.
align
5
.
globl
reset_cpu
.
globl
reset_cpu
...
@@ -582,18 +576,20 @@ reset_cpu:
...
@@ -582,18 +576,20 @@ reset_cpu:
/
*
We
set
OWE
:
WME
(
watchdog
enable
)
and
wait
until
timeout
happens
*/
/
*
We
set
OWE
:
WME
(
watchdog
enable
)
and
wait
until
timeout
happens
*/
ldr
r0
,
OSTIMER_BASE
ldr
r0
,
=
OWER
ldr
r1
,
[
r0
,
#
OWER
]
ldr
r1
,
[
r0
]
orr
r1
,
r1
,
#
0x0001
/*
bit0
:
WME
*/
orr
r1
,
r1
,
#
0x0001
/*
bit0
:
WME
*/
str
r1
,
[
r0
,
#
OWER
]
str
r1
,
[
r0
]
/
*
OS
timer
does
only
wrap
every
1165
seconds
,
so
we
have
to
set
*/
/
*
OS
timer
does
only
wrap
every
1165
seconds
,
so
we
have
to
set
*/
/
*
the
match
register
as
well
.
*/
/
*
the
match
register
as
well
.
*/
ldr
r1
,
[
r0
,
#
OSCR
]
/*
read
OS
timer
*/
ldr
r0
,
=
OSCR
ldr
r1
,
[
r0
]
/*
read
OS
timer
*/
add
r1
,
r1
,
#
0x800
/*
let
OSMR3
match
after
*/
add
r1
,
r1
,
#
0x800
/*
let
OSMR3
match
after
*/
add
r1
,
r1
,
#
0x800
/*
4096
*(
1
/
3
.6864
MHz
)=
1
ms
*/
add
r1
,
r1
,
#
0x800
/*
4096
*(
1
/
3
.6864
MHz
)=
1
ms
*/
str
r1
,
[
r0
,
#
OSMR3
]
ldr
r0
,
=
OSMR3
str
r1
,
[
r0
]
reset_endless
:
reset_endless
:
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment