Commit 49e946cb authored 11 years ago by Stephen George Committed by Andy Fleming 11 years ago

board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M


Debug trace buffers are memory mapped in DCSR space beyond 4M.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

parent 94025b1c

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