Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
R
reform-boundary-uboot
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package Registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Service Desk
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Jack Humbert
reform-boundary-uboot
Commits
44d6db6f
Commit
44d6db6f
authored
10 years ago
by
Marcel Ziswiler
Committed by
Marek Vasut
10 years ago
Browse files
Options
Downloads
Patches
Plain Diff
pxa: balloon3: fix comment about sdram banks
Signed-off-by:
Marcel Ziswiler
<
marcel@ziswiler.com
>
parent
ac078fef
No related branches found
No related tags found
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
include/configs/balloon3.h
+3
-3
3 additions, 3 deletions
include/configs/balloon3.h
with
3 additions
and
3 deletions
include/configs/balloon3.h
+
3
−
3
View file @
44d6db6f
...
...
@@ -13,7 +13,7 @@
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1
/* Marvell PXA270 CPU */
#define CONFIG_BALLOON3 1
/* Balloon3 board */
#define CONFIG_BALLOON3
1
/* Balloon3 board */
/*
* Environment settings
...
...
@@ -89,12 +89,12 @@
/*
* DRAM Map
*/
#define CONFIG_NR_DRAM_BANKS 3
/*
2
banks of DRAM */
#define CONFIG_NR_DRAM_BANKS 3
/*
3
banks of DRAM */
#define PHYS_SDRAM_1 0xa0000000
/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000
/* 128 MB */
#define PHYS_SDRAM_2 0xb0000000
/* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE 0x08000000
/* 128 MB */
#define PHYS_SDRAM_3 0x80000000
/* SDRAM Bank #
2
*/
#define PHYS_SDRAM_3 0x80000000
/* SDRAM Bank #
3
*/
#define PHYS_SDRAM_3_SIZE 0x08000000
/* 128 MB */
#define CONFIG_SYS_DRAM_BASE 0xa0000000
/* CS0 */
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment