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Commit 44876bf9 authored by Dirk Eibach's avatar Dirk Eibach Committed by Stefan Roese
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arm: mvebu: Fix ddr3_init() cpu config


Armada 38x has a maximum of two cores. Probably copy/paste
bug from Armada XP.

Signed-off-by: default avatarDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: default avatarStefan Roese <sr@denx.de>
parent 371b9e9c
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...@@ -305,8 +305,6 @@ int ddr3_init(void) ...@@ -305,8 +305,6 @@ int ddr3_init(void)
SAR1_CPU_CORE_OFFSET; SAR1_CPU_CORE_OFFSET;
switch (soc_num) { switch (soc_num) {
case 0x3: case 0x3:
reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
case 0x1: case 0x1:
reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
case 0x0: case 0x0:
......
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