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Commit 43104795 authored by York Sun's avatar York Sun Committed by Andy Fleming
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powerpc/b4860qds: Assign DDR address in board file


B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address.
This is the requirement for DSP cores to run in 32-bit address space.

Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
Signed-off-by: default avatarAndy Fleming <afleming@freescale.com>
parent ef002275
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