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Commit 39fbac91 authored by Dan Murphy's avatar Dan Murphy Committed by Tom Rini
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board: ti: DRA7: Add DP83867 TI phy for rev c


Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.

Signed-off-by: default avatarDan Murphy <dmurphy@ti.com>
Acked-by: default avatarMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: default avatarTom Rini <trini@konsulko.com>
parent 38ce65e1
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...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#include <dwc3-uboot.h> #include <dwc3-uboot.h>
#include <dwc3-omap-uboot.h> #include <dwc3-omap-uboot.h>
#include <ti-usb-phy-uboot.h> #include <ti-usb-phy-uboot.h>
#include <miiphy.h>
#include "mux_data.h" #include "mux_data.h"
#include "../common/board_detect.h" #include "../common/board_detect.h"
...@@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis) ...@@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis)
if (*omap_si_rev == DRA722_ES1_0) if (*omap_si_rev == DRA722_ES1_0)
cpsw_data.active_slave = 1; cpsw_data.active_slave = 1;
if (board_is_dra72x_revc_or_later()) {
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
}
ret = cpsw_register(&cpsw_data); ret = cpsw_register(&cpsw_data);
if (ret < 0) if (ret < 0)
printf("Error %d registering CPSW switch\n", ret); printf("Error %d registering CPSW switch\n", ret);
......
...@@ -155,6 +155,7 @@ ...@@ -155,6 +155,7 @@
#define CONFIG_MII /* Required in net/eth.c */ #define CONFIG_MII /* Required in net/eth.c */
#define CONFIG_PHY_GIGE /* per-board part of CPSW */ #define CONFIG_PHY_GIGE /* per-board part of CPSW */
#define CONFIG_PHYLIB #define CONFIG_PHYLIB
#define CONFIG_PHY_TI
/* SPI */ /* SPI */
#undef CONFIG_OMAP3_SPI #undef CONFIG_OMAP3_SPI
......
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