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Commit 377656b2 authored by Bin Meng's avatar Bin Meng
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x86: baytrail: Introduce a Kconfig option for the internal UART


There are quite a number of BayTrail boards that uses an external
SuperIO chipset to provide the legacy UART. For such cases, it's
better to have a Kconfig option to enable the internal UART.

So far BayleyBay and MinnowMax boards are using internal UART as
the U-Boot console, enable this on these two boards.

Signed-off-by: default avatarBin Meng <bmeng.cn@gmail.com>
Reviewed-by: default avatarStefan Roese <sr@denx.de>
Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
parent f698baa9
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...@@ -7,3 +7,14 @@ ...@@ -7,3 +7,14 @@
config INTEL_BAYTRAIL config INTEL_BAYTRAIL
bool bool
select HAVE_FSP if !EFI select HAVE_FSP if !EFI
if INTEL_BAYTRAIL
config INTERNAL_UART
bool "Enable the SoC integrated legacy UART"
help
There is a legacy UART integrated into the Bay Trail SoC.
A maximum baud rate of 115200 bps is supported. For this
reason, it is recommended that the UART port be used for
debug purposes only, eg: U-Boot console.
endif
...@@ -2,6 +2,7 @@ CONFIG_X86=y ...@@ -2,6 +2,7 @@ CONFIG_X86=y
CONFIG_VENDOR_INTEL=y CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="bayleybay" CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
CONFIG_TARGET_BAYLEYBAY=y CONFIG_TARGET_BAYLEYBAY=y
CONFIG_INTERNAL_UART=y
CONFIG_HAVE_INTEL_ME=y CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y CONFIG_SMP=y
......
...@@ -2,6 +2,7 @@ CONFIG_X86=y ...@@ -2,6 +2,7 @@ CONFIG_X86=y
CONFIG_VENDOR_INTEL=y CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_DEFAULT_DEVICE_TREE="minnowmax"
CONFIG_TARGET_MINNOWMAX=y CONFIG_TARGET_MINNOWMAX=y
CONFIG_INTERNAL_UART=y
CONFIG_HAVE_INTEL_ME=y CONFIG_HAVE_INTEL_ME=y
CONFIG_ENABLE_MRC_CACHE=y CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y CONFIG_SMP=y
......
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