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Commit 12bbc0ba authored by Bo Shen's avatar Bo Shen Committed by Andreas Bießmann
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ARM: atmel: switch to main crystal osc for SPL boot


If without switch to main crystal oscillator, the sama5d3 SoC will
use internal on chip RC oscillator.
In order to get better accuracy, switch to main crystal oscillator.

Signed-off-by: default avatarBo Shen <voice.shen@atmel.com>
Signed-off-by: default avatarAndreas Bießmann <andreas.devel@googlemail.com>
parent 49692c5f
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...@@ -20,6 +20,43 @@ static void at91_disable_wdt(void) ...@@ -20,6 +20,43 @@ static void at91_disable_wdt(void)
writel(AT91_WDT_MR_WDDIS, &wdt->mr); writel(AT91_WDT_MR_WDDIS, &wdt->mr);
} }
static void switch_to_main_crystal_osc(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
u32 tmp;
tmp = readl(&pmc->mor);
tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
tmp &= ~AT91_PMC_MOR_KEY(0xff);
tmp |= AT91_PMC_MOR_MOSCEN;
tmp |= AT91_PMC_MOR_OSCOUNT(8);
tmp |= AT91_PMC_MOR_KEY(0x37);
writel(tmp, &pmc->mor);
while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
;
tmp = readl(&pmc->mor);
tmp &= ~AT91_PMC_MOR_OSCBYPASS;
tmp &= ~AT91_PMC_MOR_KEY(0xff);
tmp |= AT91_PMC_MOR_KEY(0x37);
writel(tmp, &pmc->mor);
tmp = readl(&pmc->mor);
tmp |= AT91_PMC_MOR_MOSCSEL;
tmp &= ~AT91_PMC_MOR_KEY(0xff);
tmp |= AT91_PMC_MOR_KEY(0x37);
writel(tmp, &pmc->mor);
while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
;
tmp = readl(&pmc->mor);
tmp &= ~AT91_PMC_MOR_MOSCRCEN;
tmp &= ~AT91_PMC_MOR_KEY(0xff);
tmp |= AT91_PMC_MOR_KEY(0x37);
writel(tmp, &pmc->mor);
}
void at91_plla_init(u32 pllar) void at91_plla_init(u32 pllar)
{ {
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
...@@ -76,6 +113,8 @@ u32 spl_boot_mode(void) ...@@ -76,6 +113,8 @@ u32 spl_boot_mode(void)
void s_init(void) void s_init(void)
{ {
switch_to_main_crystal_osc();
/* disable watchdog */ /* disable watchdog */
at91_disable_wdt(); at91_disable_wdt();
......
...@@ -70,7 +70,10 @@ typedef struct at91_pmc { ...@@ -70,7 +70,10 @@ typedef struct at91_pmc {
#define AT91_PMC_MOR_MOSCEN 0x01 #define AT91_PMC_MOR_MOSCEN 0x01
#define AT91_PMC_MOR_OSCBYPASS 0x02 #define AT91_PMC_MOR_OSCBYPASS 0x02
#define AT91_PMC_MOR_MOSCRCEN 0x08
#define AT91_PMC_MOR_OSCOUNT(x) ((x & 0xff) << 8) #define AT91_PMC_MOR_OSCOUNT(x) ((x & 0xff) << 8)
#define AT91_PMC_MOR_KEY(x) ((x & 0xff) << 16)
#define AT91_PMC_MOR_MOSCSEL (1 << 24)
#define AT91_PMC_PLLXR_DIV(x) (x & 0xFF) #define AT91_PMC_PLLXR_DIV(x) (x & 0xFF)
#define AT91_PMC_PLLXR_PLLCOUNT(x) ((x & 0x3F) << 8) #define AT91_PMC_PLLXR_PLLCOUNT(x) ((x & 0x3F) << 8)
...@@ -142,6 +145,7 @@ typedef struct at91_pmc { ...@@ -142,6 +145,7 @@ typedef struct at91_pmc {
#define AT91_PMC_IXR_PCKRDY1 0x00000200 #define AT91_PMC_IXR_PCKRDY1 0x00000200
#define AT91_PMC_IXR_PCKRDY2 0x00000400 #define AT91_PMC_IXR_PCKRDY2 0x00000400
#define AT91_PMC_IXR_PCKRDY3 0x00000800 #define AT91_PMC_IXR_PCKRDY3 0x00000800
#define AT91_PMC_IXR_MOSCSELS 0x00010000
#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ #define AT91_PMC_PCK (1 << 0) /* Processor Clock */
#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
......
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