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Commit 0897eb2c authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by York Sun
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kconfig: armv8: move armv8 sec_firmware CONFIG_* to Kconfig


Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
[York S: clean up scripts/config_whitelist.txt]
Reviewed-by: default avatarYork Sun <york.sun@nxp.com>
parent 7c5e1feb
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...@@ -39,6 +39,39 @@ config ARMV8_SPIN_TABLE ...@@ -39,6 +39,39 @@ config ARMV8_SPIN_TABLE
- Reserve the code for the spin-table and the release address - Reserve the code for the spin-table and the release address
via a /memreserve/ region in the Device Tree. via a /memreserve/ region in the Device Tree.
menu "ARMv8 secure monitor firmware"
config ARMV8_SEC_FIRMWARE_SUPPORT
bool "Enable ARMv8 secure monitor firmware framework support"
select OF_LIBFDT
select FIT
help
This framework is aimed at making secure monitor firmware load
process brief.
Note: Only FIT format image is supported.
You should prepare and provide the below information:
- Address of secure firmware.
- Address to hold the return address from secure firmware.
- Secure firmware FIT image related information.
Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMEWARE_FIT_CNF_NAME
- The target exception level that secure monitor firmware will
return to.
config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
bool "Enable ARMv8 secure monitor firmware framework support for SPL"
select SPL_OF_LIBFDT
select SPL_FIT
help
Say Y here to support this framework in SPL phase.
config ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
bool "ARMv8 secure monitor firmware ERET address byteorder swap"
depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT
help
Say Y here when the endianness of the register or memory holding the
Secure firmware exception return address is different with core's.
endmenu
config PSCI_RESET config PSCI_RESET
bool "Use PSCI for reset and shutdown" bool "Use PSCI for reset and shutdown"
default y default y
......
...@@ -19,7 +19,7 @@ obj-y += cpu-dt.o ...@@ -19,7 +19,7 @@ obj-y += cpu-dt.o
ifndef CONFIG_SPL_BUILD ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
endif endif
obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_S32V234) += s32v234/
......
...@@ -23,12 +23,12 @@ WEAK(_sec_firmware_entry) ...@@ -23,12 +23,12 @@ WEAK(_sec_firmware_entry)
/* Set exception return address hold pointer */ /* Set exception return address hold pointer */
adr x4, 1f adr x4, 1f
mov x3, x4 mov x3, x4
#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT #ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
rev w3, w3 rev w3, w3
#endif #endif
str w3, [x1] str w3, [x1]
lsr x3, x4, #32 lsr x3, x4, #32
#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT #ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
rev w3, w3 rev w3, w3
#endif #endif
str w3, [x2] str w3, [x2]
......
...@@ -10,9 +10,6 @@ ...@@ -10,9 +10,6 @@
#include "ls1043a_common.h" #include "ls1043a_common.h"
#if defined(CONFIG_FSL_LS_PPA) #if defined(CONFIG_FSL_LS_PPA)
#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#define SEC_FIRMWARE_ERET_ADDR_REVERT
#define CONFIG_SYS_LS_PPA_FW_IN_XIP #define CONFIG_SYS_LS_PPA_FW_IN_XIP
#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
#define CONFIG_SYS_LS_PPA_FW_ADDR 0x60500000 #define CONFIG_SYS_LS_PPA_FW_ADDR 0x60500000
......
...@@ -10,10 +10,6 @@ ...@@ -10,10 +10,6 @@
#include "ls1046a_common.h" #include "ls1046a_common.h"
#if defined(CONFIG_FSL_LS_PPA) #if defined(CONFIG_FSL_LS_PPA)
#define CONFIG_ARMV8_PSCI
#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE (1UL * 1024 * 1024)
#define CONFIG_SYS_LS_PPA_FW_IN_XIP #define CONFIG_SYS_LS_PPA_FW_IN_XIP
#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
#define CONFIG_SYS_LS_PPA_FW_ADDR 0x40500000 #define CONFIG_SYS_LS_PPA_FW_ADDR 0x40500000
......
...@@ -181,7 +181,6 @@ CONFIG_ARMV7_PSCI_1_0 ...@@ -181,7 +181,6 @@ CONFIG_ARMV7_PSCI_1_0
CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
CONFIG_ARMV8_SWITCH_TO_EL1 CONFIG_ARMV8_SWITCH_TO_EL1
CONFIG_ARM_ARCH_CP15_ERRATA CONFIG_ARM_ARCH_CP15_ERRATA
CONFIG_ARM_ASM_UNIFIED CONFIG_ARM_ASM_UNIFIED
......
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