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Commit 03b81b48 authored by Andy Fleming's avatar Andy Fleming Committed by Andrew Fleming-AFLEMING
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Some 85xx cpu cleanups


* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization

Signed-off-by: default avatarEd Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: default avatarJon Loeliger <jdl@freescale.com>
Acked-by: default avatarAndy Fleming <afleming@freescale.com>
parent 151d5d99
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......@@ -198,9 +198,9 @@ reset_85xx_watchdog(void)
* Clear TSR(WIS) bit by writing 1
*/
unsigned long val;
val = mfspr(tsr);
val |= 0x40000000;
mtspr(tsr, val);
val = mfspr(SPRN_TSR);
val |= TSR_WIS;
mtspr(SPRN_TSR, val);
}
#endif /* CONFIG_WATCHDOG */
......@@ -211,6 +211,7 @@ void dma_init(void) {
dma->satr0 = 0x02c40000;
dma->datr0 = 0x02c40000;
dma->sr0 = 0xfffffff; /* clear any errors */
asm("sync; isync; msync");
return;
}
......@@ -225,6 +226,10 @@ uint dma_check(void) {
status = dma->sr0;
}
/* clear MR0[CS] channel start bit */
dma->mr0 &= 0x00000001;
asm("sync;isync;msync");
if (status != 0) {
printf ("DMA Error: status = %x\n", status);
}
......
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