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README.fsl-ddr

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  • Forked from Reform / reform-boundary-uboot
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    • York Sun's avatar
      6f5e1dc5
      powerpc/8xxx: Add support for interactive DDR programming interface · 6f5e1dc5
      York Sun authored
      
      Interactive DDR debugging provides a user interface to view and modify SPD,
      DIMM parameters, board options and DDR controller registers before DDR is
      initialized. With this feature, developers can fine-tune DDR for board
      bringup and other debugging without frequently having to reprogram the flash.
      
      To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
      file and set an environment variable to activate it. Syntax:
      
      setenv ddr_interactive on
      
      After reset, U-boot prompts before initializing DDR controllers
      FSL DDR>
      
      The available commands are
      print      print SPD and intermediate computed data
      reset      reboot machine
      recompute  reload SPD and options to default and recompute regs
      edit       modify spd, parameter, or option
      compute    recompute registers from current next_step to end
      next_step  shows current next_step
      help       this message
      go         program the memory controller and continue with u-boot
      
      The first command should be "compute", which reads data from DIMM SPDs and
      board options, performs the calculation then stops before setting DDR
      controller. A user can use "print" and "edit" commands to view and modify
      anything. "Go" picks up from current step with any modification and
      compltes the calculation then enables the DDR controller to continue u-boot.
      "Recompute" does it over from fresh reading.
      
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      6f5e1dc5
      History
      powerpc/8xxx: Add support for interactive DDR programming interface
      York Sun authored
      
      Interactive DDR debugging provides a user interface to view and modify SPD,
      DIMM parameters, board options and DDR controller registers before DDR is
      initialized. With this feature, developers can fine-tune DDR for board
      bringup and other debugging without frequently having to reprogram the flash.
      
      To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
      file and set an environment variable to activate it. Syntax:
      
      setenv ddr_interactive on
      
      After reset, U-boot prompts before initializing DDR controllers
      FSL DDR>
      
      The available commands are
      print      print SPD and intermediate computed data
      reset      reboot machine
      recompute  reload SPD and options to default and recompute regs
      edit       modify spd, parameter, or option
      compute    recompute registers from current next_step to end
      next_step  shows current next_step
      help       this message
      go         program the memory controller and continue with u-boot
      
      The first command should be "compute", which reads data from DIMM SPDs and
      board options, performs the calculation then stops before setting DDR
      controller. A user can use "print" and "edit" commands to view and modify
      anything. "Go" picks up from current step with any modification and
      compltes the calculation then enables the DDR controller to continue u-boot.
      "Recompute" does it over from fresh reading.
      
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    README.fsl-ddr 18.16 KiB