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reset.c

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  • Forked from Reform / reform-boundary-uboot
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    nand_boot.c 6.39 KiB
    /*
     * (C) Copyright 2006-2008
     * Stefan Roese, DENX Software Engineering, sr@denx.de.
     *
     * This program is free software; you can redistribute it and/or
     * modify it under the terms of the GNU General Public License as
     * published by the Free Software Foundation; either version 2 of
     * the License, or (at your option) any later version.
     *
     * This program is distributed in the hope that it will be useful,
     * but WITHOUT ANY WARRANTY; without even the implied warranty of
     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     * GNU General Public License for more details.
     *
     * You should have received a copy of the GNU General Public License
     * along with this program; if not, write to the Free Software
     * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
     * MA 02111-1307 USA
     */
    
    #include <common.h>
    #include <nand.h>
    #include <asm/io.h>
    
    #define CFG_NAND_READ_DELAY \
    	{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
    
    static int nand_ecc_pos[] = CFG_NAND_ECCPOS;
    
    extern void board_nand_init(struct nand_chip *nand);
    
    #if (CFG_NAND_PAGE_SIZE <= 512)
    /*
     * NAND command for small page NAND devices (512)
     */
    static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
    {
    	struct nand_chip *this = mtd->priv;
    	int page_addr = page + block * CFG_NAND_PAGE_COUNT;
    
    	if (this->dev_ready)
    		while (!this->dev_ready(mtd))
    			;
    	else
    		CFG_NAND_READ_DELAY;
    
    	/* Begin command latch cycle */
    	this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
    	/* Set ALE and clear CLE to start address cycle */
    	/* Column address */
    	this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
    	this->cmd_ctrl(mtd, page_addr & 0xff, 0); /* A[16:9] */
    	this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, 0); /* A[24:17] */
    #ifdef CFG_NAND_4_ADDR_CYCLE
    	/* One more address cycle for devices > 32MiB */
    	this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[28:25] */
    #endif
    	/* Latch in address */
    	this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
    
    	/*
    	 * Wait a while for the data to be ready
    	 */
    	if (this->dev_ready)
    		while (!this->dev_ready(mtd))
    			;
    	else
    		CFG_NAND_READ_DELAY;
    
    	return 0;