Forked from
Reform / reform-boundary-uboot
Source project has a limited visibility.
-
Patrice Chotard authored
Configure SAI PLL configuration to generate LTDC pixel clock on the PLLSAIR output. PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set. Signed-off-by:Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard authoredConfigure SAI PLL configuration to generate LTDC pixel clock on the PLLSAIR output. PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set. Signed-off-by:
