Skip to content
Snippets Groups Projects
Forked from Reform / reform-boundary-uboot
Loading
  • Wang Dongsheng's avatar
    c5e954ec
    ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined · c5e954ec
    Wang Dongsheng authored
    
    "DISCARD" will remove ._secure.text relocate, but PSCI framework
    has already used some absolute address those need to relocate.
    
    Use readelf -t -r u-boot show us:
    .__secure_start		addr: 601408e4
    .__secure_end		addr: 60141460
    
    60141140  00000017 R_ARM_RELATIVE
    46	_secure_monitor:
    47	#ifdef CONFIG_ARMV7_PSCI
    48      ldr     r5, =_psci_vectors
    
    60141194  00000017 R_ARM_RELATIVE
    6014119c  00000017 R_ARM_RELATIVE
    601411a4  00000017 R_ARM_RELATIVE
    601411ac  00000017 R_ARM_RELATIVE
    64	_psci_table:
    66	.word	psci_cpu_suspend
    ...
    72	.word	psci_migrate
    
    60141344  00000017 R_ARM_RELATIVE
    6014145c  00000017 R_ARM_RELATIVE
    202	ldr     r5, =psci_text_end
    
    Solutions:
    1. Change absolute address to RelAdr.
       Based on LDR (immediate, ARM), we only have 4K offset to jump.
    Now PSCI code size is close to 4K size that is LDR limit jump size,
    so even if the LDR is based on the current instruction address,
    there is also have a risk for RelAdr. If we use two jump steps I
    think we can fix this issue, but looks too hack, so give up this way.
    
    2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
       If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
    will in the BASE address that is absolute.
    
    Signed-off-by: default avatarWang Dongsheng <dongsheng.wang@nxp.com>
    Reviewed-by: default avatarTom Rini <trini@konsulko.com>
    c5e954ec
    History
    ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
    Wang Dongsheng authored
    
    "DISCARD" will remove ._secure.text relocate, but PSCI framework
    has already used some absolute address those need to relocate.
    
    Use readelf -t -r u-boot show us:
    .__secure_start		addr: 601408e4
    .__secure_end		addr: 60141460
    
    60141140  00000017 R_ARM_RELATIVE
    46	_secure_monitor:
    47	#ifdef CONFIG_ARMV7_PSCI
    48      ldr     r5, =_psci_vectors
    
    60141194  00000017 R_ARM_RELATIVE
    6014119c  00000017 R_ARM_RELATIVE
    601411a4  00000017 R_ARM_RELATIVE
    601411ac  00000017 R_ARM_RELATIVE
    64	_psci_table:
    66	.word	psci_cpu_suspend
    ...
    72	.word	psci_migrate
    
    60141344  00000017 R_ARM_RELATIVE
    6014145c  00000017 R_ARM_RELATIVE
    202	ldr     r5, =psci_text_end
    
    Solutions:
    1. Change absolute address to RelAdr.
       Based on LDR (immediate, ARM), we only have 4K offset to jump.
    Now PSCI code size is close to 4K size that is LDR limit jump size,
    so even if the LDR is based on the current instruction address,
    there is also have a risk for RelAdr. If we use two jump steps I
    think we can fix this issue, but looks too hack, so give up this way.
    
    2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined.
       If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure
    will in the BASE address that is absolute.
    
    Signed-off-by: default avatarWang Dongsheng <dongsheng.wang@nxp.com>
    Reviewed-by: default avatarTom Rini <trini@konsulko.com>