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fsl_ddr_sdram.h
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Matthew McClintock authored
Currently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by:
Matthew McClintock <msm@freescale.com> Signed-off-by:
Andy Fleming <afleming@freescale.com>
Matthew McClintock authoredCurrently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by:
Matthew McClintock <msm@freescale.com> Signed-off-by:
Andy Fleming <afleming@freescale.com>