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York Sun authored
When DDR data rate is higher than 1200MT/s or controller interleaving is enabled, additional cycle for write-to-read turnaround is needed to satisfy dynamic ODT timing. Signed-off-by:
York Sun <yorksun@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
York Sun authoredWhen DDR data rate is higher than 1200MT/s or controller interleaving is enabled, additional cycle for write-to-read turnaround is needed to satisfy dynamic ODT timing. Signed-off-by:
ddr.h 2.75 KiB