fsl_ddr_gen4.c

Forked from Reform / reform-boundary-uboot

9 years ago

fsl/ddr: Add workaround for ERRATUM_A009942 · 0d3972cf

Shengzhou Liu authored 9 years ago


During the receive data training, the DDRC may complete on a
non-optimal setting that could lead to data corruption or
initialization failure.

Workaround: before setting MEM_EN, set DEBUG_29 register with
specific value for different data rates.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>

0d3972cf

History

fsl/ddr: Add workaround for ERRATUM_A009942

Shengzhou Liu authored 9 years ago


During the receive data training, the DDRC may complete on a
non-optimal setting that could lead to data corruption or
initialization failure.

Workaround: before setting MEM_EN, set DEBUG_29 register with
specific value for different data rates.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>

fsl_ddr_gen4.c 14.96 KiB