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cfi_flash.c

Forked from Reform / reform-boundary-uboot
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  • Daniel Hellstrom's avatar
    97bf85d7
    MTD/CFI: flash_read64 is defined a weak function (for SPARC) · 97bf85d7
    Daniel Hellstrom authored
    
    SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
    SPARC CPUs implement flash_read64 which calls __raw_readq.
    
    For current SPARC architectures (LEON2 and LEON3) each read from the
    FLASH must lead to a cache miss. This is because FLASH can not be set
    non-cacheable since program code resides there, and alternatively disabling
    cache is poor from performance view, or doing a cache flush between each
    read is even poorer.
    
    Forcing a cache miss on a SPARC is done by a special instruction "lda" -
    load alternative space, the alternative space number (ASI) is processor
    implementation spcific and can be found by including <asm/processor.h>.
    
    Signed-off-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
    97bf85d7
    History
    MTD/CFI: flash_read64 is defined a weak function (for SPARC)
    Daniel Hellstrom authored
    
    SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
    SPARC CPUs implement flash_read64 which calls __raw_readq.
    
    For current SPARC architectures (LEON2 and LEON3) each read from the
    FLASH must lead to a cache miss. This is because FLASH can not be set
    non-cacheable since program code resides there, and alternatively disabling
    cache is poor from performance view, or doing a cache flush between each
    read is even poorer.
    
    Forcing a cache miss on a SPARC is done by a special instruction "lda" -
    load alternative space, the alternative space number (ASI) is processor
    implementation spcific and can be found by including <asm/processor.h>.
    
    Signed-off-by: default avatarDaniel Hellstrom <daniel@gaisler.com>