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    219c2db3
    MIPS: Ensure cache ops complete in cache maintenance functions · 219c2db3
    Paul Burton authored
    
    A typical use of cache maintenance functions is to force writeback of
    data which a device is about to read using DMA - for example a
    descriptor or command structure. Such users of cache maintenance
    functions require that operations on the cache have completed before
    they proceed to instruct a device to read memory. This requires that we
    place a completion barrier (ie. sync instruction) between the cache ops
    and whatever write informs the device to perform DMA.
    
    Whilst strictly speaking this isn't all users of the cache maintenance
    functions & we could instead place the barriers in the drivers that
    require them, it would be much more invasive to do so than to just have
    the barrier be the default by placing it in the cache functions
    themselves. The cost is low enough that it shouldn't matter to us in any
    rare cases that we use the cache functions when not performing DMA.
    
    Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: u-boot@lists.denx.de
    219c2db3
    History
    MIPS: Ensure cache ops complete in cache maintenance functions
    Paul Burton authored
    
    A typical use of cache maintenance functions is to force writeback of
    data which a device is about to read using DMA - for example a
    descriptor or command structure. Such users of cache maintenance
    functions require that operations on the cache have completed before
    they proceed to instruct a device to read memory. This requires that we
    place a completion barrier (ie. sync instruction) between the cache ops
    and whatever write informs the device to perform DMA.
    
    Whilst strictly speaking this isn't all users of the cache maintenance
    functions & we could instead place the barriers in the drivers that
    require them, it would be much more invasive to do so than to just have
    the barrier be the default by placing it in the cache functions
    themselves. The cost is low enough that it shouldn't matter to us in any
    rare cases that we use the cache functions when not performing DMA.
    
    Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: u-boot@lists.denx.de