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fsl_pci_init.c
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Minghuan Lian authored
Freescale PCIe controllers v3.0 and later need to set bit CFG_READY to allow all inbound configuration transactions to be processed normally when in EP mode. However, bit CFG_READY has been moved from PCIe configuration space to CCSR PCIe configuration register comparing previous version. The patch is to set this bit according to PCIe version. Signed-off-by:
Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Signed-off-by:
Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
Minghuan Lian authoredFreescale PCIe controllers v3.0 and later need to set bit CFG_READY to allow all inbound configuration transactions to be processed normally when in EP mode. However, bit CFG_READY has been moved from PCIe configuration space to CCSR PCIe configuration register comparing previous version. The patch is to set this bit according to PCIe version. Signed-off-by:
