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Reform / reform-boundary-uboot
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Chase Maupin authored
* For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by:Chase Maupin <Chase.Maupin@ti.com>
Chase Maupin authored* For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by:
