Newer
Older
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
/*
* (C) Copyright 2000-2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
********************************************************************
*
* Lots of code copied from:
*
* m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
* (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
*
* "The ExCA standard specifies that socket controllers should provide
* two IO and five memory windows per socket, which can be independently
* configured and positioned in the host address space and mapped to
* arbitrary segments of card address space. " - David A Hinds. 1999
*
* This controller does _not_ meet the ExCA standard.
*
* m8xx pcmcia controller brief info:
* + 8 windows (attrib, mem, i/o)
* + up to two slots (SLOT_A and SLOT_B)
* + inputpins, outputpins, event and mask registers.
* - no offset register. sigh.
*
* Because of the lacking offset register we must map the whole card.
* We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
* Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
* * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
* The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
* They are maximum 64KByte each...
*/
/* #define DEBUG 1 */
/*
* PCMCIA support
*/
#include <common.h>
#include <command.h>
#include <config.h>
#include <pcmcia.h>
#include <cmd_pcmcia.h>
#if defined(CONFIG_IDE_8xx_PCCARD) && defined(CONFIG_8xx)
#include <mpc8xx.h>
#endif
#if defined(CONFIG_LWMON)
#include <i2c.h>
#endif
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \
((CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD))
int pcmcia_on (void);
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int pcmcia_off (void);
static int hardware_disable(int slot);
#endif
static int hardware_enable (int slot);
static int voltage_set(int slot, int vcc, int vpp);
#ifdef CONFIG_IDE_8xx_PCCARD
static void print_funcid (int func);
static void print_fixed (volatile uchar *p);
static int identify (volatile uchar *p);
static int check_ide_device (int slot);
#endif /* CONFIG_IDE_8xx_PCCARD */
static u_int m8xx_get_graycode(u_int size);
#if 0
static u_int m8xx_get_speed(u_int ns, u_int is_io);
#endif
/* -------------------------------------------------------------------- */
/* look up table for pgcrx registers */
static u_int *pcmcia_pgcrx[2] = {
&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
};
#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
const char *indent = "\t ";
/* -------------------------------------------------------------------- */
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = 0;
if (argc != 2) {
printf ("Usage: pinit {on | off}\n");
return 1;
}
if (strcmp(argv[1],"on") == 0) {
rcode = pcmcia_on ();
} else if (strcmp(argv[1],"off") == 0) {
rcode = pcmcia_off ();
} else {
printf ("Usage: pinit {on | off}\n");
return 1;
}
return rcode;
}
#endif /* CFG_CMD_PCMCIA */
/* -------------------------------------------------------------------- */
#if defined(CONFIG_LWMON)
# define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12))
#else
# define CFG_PCMCIA_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(4) | PCMCIA_SL(9))
#endif
int pcmcia_on (void)
{
int i;
u_long reg, base;
pcmcia_win_t *win;
u_int slotbit;
u_int rc, slot;
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
/* intialize the fixed memory windows */
win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
base = CFG_PCMCIA_MEM_ADDR;
if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
printf ("Cannot set window size to 0x%08x\n",
CFG_PCMCIA_MEM_SIZE);
return (1);
}
slotbit = PCMCIA_SLOT_x;
for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
win->br = base;
#if (PCMCIA_SOCKETS_NO == 2)
if (i == 4) /* Another slot starting from win 4 */
slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
#endif
case 4:
case 0: { /* map attribute memory */
win->or = ( PCMCIA_BSIZE_64M
| PCMCIA_PPS_8
| PCMCIA_PRS_ATTR
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
case 5:
case 1: { /* map I/O window for data reg */
win->or = ( PCMCIA_BSIZE_1K
| PCMCIA_PPS_16
| PCMCIA_PRS_IO
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
case 6:
case 2: { /* map I/O window for cmd/ctrl reg block */
win->or = ( PCMCIA_BSIZE_1K
| PCMCIA_PPS_8
| PCMCIA_PRS_IO
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
#endif /* CONFIG_IDE_8xx_PCCARD */
default: /* set to not valid */
win->or = 0;
break;
}
debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
i, win->br, win->or);
base += CFG_PCMCIA_MEM_SIZE;
++win;
}
for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
/* turn off voltage */
if ((rc = voltage_set(slot, 0, 0)))
continue;
/* Enable external hardware */
if ((rc = hardware_enable(slot)))
continue;
if ((rc = check_ide_device(i)))
continue;
}
return (rc);
/* -------------------------------------------------------------------- */
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int pcmcia_off (void)
{
int i;
pcmcia_win_t *win;
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
/* clear interrupt state, and disable interrupts */
((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
/* turn off interrupt and disable CxOE */
PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
/* turn off memory windows */
win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
/* disable memory window */
win->or = 0;
++win;
}
/* turn off voltage */
voltage_set(_slot_, 0, 0);
/* disable external hardware */
printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
hardware_disable(_slot_);
return 0;
}
#endif /* CFG_CMD_PCMCIA */
/* -------------------------------------------------------------------- */
#ifdef CONFIG_IDE_8xx_PCCARD
#define MAX_TUPEL_SZ 512
#define MAX_FEATURES 4
static int check_ide_device (int slot)
{
volatile uchar *ident = NULL;
volatile uchar *feature_p[MAX_FEATURES];
volatile uchar *p, *start, *addr;
int n_features = 0;
uchar func_id = ~0;
uchar code, len;
ushort config_base = 0;
int found = 0;
int i;
addr = (volatile uchar *)(CFG_PCMCIA_MEM_ADDR +
CFG_PCMCIA_MEM_SIZE * (slot * 4));
debug ("PCMCIA MEM: %08X\n", addr);
start = p = (volatile uchar *) addr;
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
while ((p - start) < MAX_TUPEL_SZ) {
code = *p; p += 2;
if (code == 0xFF) { /* End of chain */
break;
}
len = *p; p += 2;
#if defined(DEBUG) && (DEBUG > 1)
{ volatile uchar *q = p;
printf ("\nTuple code %02x length %d\n\tData:",
code, len);
for (i = 0; i < len; ++i) {
printf (" %02x", *q);
q+= 2;
}
}
#endif /* DEBUG */
switch (code) {
case CISTPL_VERS_1:
ident = p + 4;
break;
case CISTPL_FUNCID:
/* Fix for broken SanDisk which may have 0x80 bit set */
func_id = *p & 0x7F;
break;
case CISTPL_FUNCE:
if (n_features < MAX_FEATURES)
feature_p[n_features++] = p;
break;
case CISTPL_CONFIG:
config_base = (*(p+6) << 8) + (*(p+4));
debug ("\n## Config_base = %04x ###\n", config_base);
default:
break;
}
p += 2 * len;
}
found = identify (ident);
if (func_id != ((uchar)~0)) {
print_funcid (func_id);
if (func_id == CISTPL_FUNCID_FIXED)
found = 1;
else
return (1); /* no disk drive */
}
for (i=0; i<n_features; ++i) {
print_fixed (feature_p[i]);
}
if (!found) {
printf ("unknown card type\n");
return (1);
}
/* set I/O area in config reg -> only valid for ARGOSY D5!!! */
*((uchar *)(addr + config_base)) = 1;
return (0);
}
#endif /* CONFIG_IDE_8xx_PCCARD */
/* -------------------------------------------------------------------- */
/* -------------------------------------------------------------------- */
/* board specific stuff: */
/* voltage_set(), hardware_enable() and hardware_disable() */
/* -------------------------------------------------------------------- */
/* -------------------------------------------------------------------- */
/* RPX Boards from Embedded Planet */
/* -------------------------------------------------------------------- */
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
* SYPCR is write once only, therefore must the slowest memory be faster
* than the bus monitor or we will get a machine check due to the bus timeout.
*/
#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
#undef PCMCIA_BMT_LIMIT
#define PCMCIA_BMT_LIMIT (6*8)
static int voltage_set(int slot, int vcc, int vpp)
{
u_long reg = 0;
switch(vcc) {
case 0: break;
case 33: reg |= BCSR1_PCVCTL4; break;
case 50: reg |= BCSR1_PCVCTL5; break;
default: return 1;
}
switch(vpp) {
case 0: break;
case 33:
case 50:
if(vcc == vpp)
reg |= BCSR1_PCVCTL6;
else
return 1;
break;
case 120:
reg |= BCSR1_PCVCTL7;
default: return 1;
}
if(vcc == 120)
return 1;
/* first, turn off all power */
*((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5
| BCSR1_PCVCTL6 | BCSR1_PCVCTL7);
/* enable new powersettings */
*((uint *)RPX_CSR_ADDR) |= reg;
return 0;
}
#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
static int hardware_enable (int slot)
{
return 0; /* No hardware to enable */
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int hardware_disable(int slot)
{
return 0; /* No hardware to disable */
}
#endif /* CFG_CMD_PCMCIA */
#endif /* CONFIG_RPXCLASSIC */
/* -------------------------------------------------------------------- */
/* (F)ADS Boards from Motorola */
/* -------------------------------------------------------------------- */
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
#if defined(CONFIG_ADS) || defined(CONFIG_FADS)
#ifdef CONFIG_ADS
#define PCMCIA_BOARD_MSG "ADS"
#define PCMCIA_GLITCHY_CD /* My ADS board needs this */
#else
#define PCMCIA_BOARD_MSG "FADS"
#endif
static int voltage_set(int slot, int vcc, int vpp)
{
u_long reg = 0;
switch(vpp) {
case 0: reg = 0; break;
case 50: reg = 1; break;
case 120: reg = 2; break;
default: return 1;
}
switch(vcc) {
case 0: reg = 0; break;
#ifdef CONFIG_ADS
case 50: reg = BCSR1_PCCVCCON; break;
#endif
#ifdef CONFIG_FADS
case 33: reg = BCSR1_PCCVCC0 | BCSR1_PCCVCC1; break;
case 50: reg = BCSR1_PCCVCC1; break;
#endif
default: return 1;
}
/* first, turn off all power */
#ifdef CONFIG_ADS
*((uint *)BCSR1) |= BCSR1_PCCVCCON;
#endif
#ifdef CONFIG_FADS
*((uint *)BCSR1) &= ~(BCSR1_PCCVCC0 | BCSR1_PCCVCC1);
#endif
*((uint *)BCSR1) &= ~BCSR1_PCCVPP_MASK;
/* enable new powersettings */
#ifdef CONFIG_ADS
*((uint *)BCSR1) &= ~reg;
#endif
#ifdef CONFIG_FADS
*((uint *)BCSR1) |= reg;
#endif
*((uint *)BCSR1) |= reg << 20;
return 0;
}
#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
static int hardware_enable(int slot)
{
*((uint *)BCSR1) &= ~BCSR1_PCCEN;
return 0;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int hardware_disable(int slot)
{
*((uint *)BCSR1) &= ~BCSR1_PCCEN;
return 0;
}
#endif /* CFG_CMD_PCMCIA */
#endif /* (F)ADS */
/* -------------------------------------------------------------------- */
/* TQM8xxL Boards by TQ Components */
/* -------------------------------------------------------------------- */
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
#if defined(CONFIG_TQM8xxL)
#define PCMCIA_BOARD_MSG "TQM8xxL"
static int hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable
*/
immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
/* remove all power */
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
immap->im_ioport.iop_pcdat |= 0x0004;
puts (" 5.0V card found: ");
} else {
immap->im_ioport.iop_pcdat |= 0x0002;
puts (" 3.3V card found: ");
}
immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
#if 0
/* VCC switch error flag, PCMCIA slot INPACK_ pin */
cp->cp_pbdir &= ~(0x0020 | 0x0010);
cp->cp_pbpar &= ~(0x0020 | 0x0010);
udelay(500000);
#endif
udelay(1000);
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int hardware_disable(int slot)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* remove all power */
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
debug ("Disable PCMCIA buffers and assert RESET\n");
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
static int voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn off all power
*/
debug ("PCMCIA power OFF\n");
immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
reg = 0;
switch(vcc) {
case 0: break;
case 33: reg |= 0x0002; break;
case 50: reg |= 0x0004; break;
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
immap->im_ioport.iop_pcdat |= reg;
immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
if (reg) {
debug ("PCMCIA powered at %sV\n",
(reg&0x0004) ? "5.0" : "3.3");
} else {
debug ("PCMCIA powered down\n");
}
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* TQM8xxL */
/* -------------------------------------------------------------------- */
/* LWMON Board */
/* -------------------------------------------------------------------- */
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
#if defined(CONFIG_LWMON)
#define PCMCIA_BOARD_MSG "LWMON"
/* #define's for MAX1604 Power Switch */
#define MAX1604_OP_SUS 0x80
#define MAX1604_VCCBON 0x40
#define MAX1604_VCC_35 0x20
#define MAX1604_VCCBHIZ 0x10
#define MAX1604_VPPBON 0x08
#define MAX1604_VPPBPBPGM 0x04
#define MAX1604_VPPBHIZ 0x02
/* reserved 0x01 */
static int hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
uchar val;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
/* Switch on PCMCIA port in PIC register 0x60 */
reg = pic_read (0x60);
debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
reg &= ~0x10;
/* reg |= 0x08; Vpp not needed */
pic_write (0x60, reg);
#ifdef DEBUG
reg = pic_read (0x60);
printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
#endif
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
val = 0; /* VCCB3/5 = 0 ==> use Vx = 5.0 V */
puts (" 5.0V card found: ");
} else {
val = MAX1604_VCC_35; /* VCCB3/5 = 1 ==> use Vy = 3.3 V */
puts (" 3.3V card found: ");
}
/* switch VCC on */
val |= MAX1604_OP_SUS | MAX1604_VCCBON;
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
udelay(500000);
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int hardware_disable(int slot)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
uchar val;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* remove all power, put output in high impedance state */
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
/* Switch off PCMCIA port in PIC register 0x60 */
reg = pic_read (0x60);
debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
reg |= 0x10;
reg &= ~0x08;
pic_write (0x60, reg);
#ifdef DEBUG
reg = pic_read (0x60);
printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
#endif
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
static int voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
uchar val;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Turn off all power (switch to high impedance)
*/
debug ("PCMCIA power OFF\n");
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
val = 0;
switch(vcc) {
case 0: break;
case 33: val = MAX1604_VCC_35; break;
case 50: break;
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
if (val) {
debug ("PCMCIA powered at %sV\n",
(val & MAX1604_VCC_35) ? "3.3" : "5.0");
} else {
debug ("PCMCIA powered down\n");
}
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* LWMON */
/* -------------------------------------------------------------------- */
/* GTH board by Corelatus AB */
/* -------------------------------------------------------------------- */
#if defined(CONFIG_GTH)
#define PCMCIA_BOARD_MSG "GTH COMPACT FLASH"
static int voltage_set (int slot, int vcc, int vpp)
{ /* Do nothing */
return 0;
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: GTH Slot %c\n", 'A' + slot);
immap = (immap_t *) CFG_IMMR;
sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX (_slot_) = reg;
udelay (500);
/*
* Make sure there is a card in the slot,
* then configure the interface.
*/
udelay (10000);