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    /*
     * (C) Copyright 2007-2008
    
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     * Stelian Pop <stelian@popies.net>
    
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     * Lead Tech Design <www.leadtechdesign.com>
     *
     * See file CREDITS for list of people who contributed to this
     * project.
     *
     * This program is free software; you can redistribute it and/or
     * modify it under the terms of the GNU General Public License as
     * published by the Free Software Foundation; either version 2 of
     * the License, or (at your option) any later version.
     *
     * This program is distributed in the hope that it will be useful,
     * but WITHOUT ANY WARRANTY; without even the implied warranty of
     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
     * GNU General Public License for more details.
     *
     * You should have received a copy of the GNU General Public License
     * along with this program; if not, write to the Free Software
     * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
     * MA 02111-1307 USA
     */
    
    #include <common.h>
    
    #include <asm/sizes.h>
    
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    #include <asm/arch/at91sam9263.h>
    #include <asm/arch/at91sam9_smc.h>
    
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    #include <asm/arch/at91_pmc.h>
    #include <asm/arch/at91_rstc.h>
    
    #include <asm/arch/at91_matrix.h>
    #include <asm/arch/at91_pio.h>
    
    #include <asm/io.h>
    #include <asm/arch/gpio.h>
    
    #include <lcd.h>
    #include <atmel_lcdc.h>
    
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    #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
    #include <net.h>
    #endif
    
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    DECLARE_GLOBAL_DATA_PTR;
    
    /* ------------------------------------------------------------------------- */
    /*
     * Miscelaneous platform dependent initialisations
     */
    
    #ifdef CONFIG_CMD_NAND
    static void at91sam9263ek_nand_hw_init(void)
    {
    	unsigned long csa;
    
    	at91_smc_t    *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
    	at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
    	at91_pmc_t    *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
    
    
    	/* Enable CS3 */
    	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
    	writel(csa, &matrix->csa[0]);
    
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    	/* Enable CS3 */
    
    	/* Configure SMC CS3 for NAND/SmartMedia */
    
    	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
    		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
    		&smc->cs[3].setup);
    
    	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
    		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
    		&smc->cs[3].pulse);
    
    	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
    		&smc->cs[3].cycle);
    	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
    		AT91_SMC_MODE_EXNW_DISABLE |
    
    #ifdef CONFIG_SYS_NAND_DBW_16
    
    		       AT91_SMC_MODE_DBW_16 |
    
    #else /* CONFIG_SYS_NAND_DBW_8 */
    
    		       AT91_SMC_MODE_DBW_8 |
    
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    #endif
    
    		       AT91_SMC_MODE_TDF_CYCLE(2),
    		&smc->cs[3].mode);
    
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    	writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE,
    
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    	/* Configure RDY/BSY */
    
    	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
    
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    	/* Enable NandFlash */
    
    	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
    
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    }
    #endif
    
    #ifdef CONFIG_MACB
    static void at91sam9263ek_macb_hw_init(void)
    {
    
    	unsigned long 	erstl;
    
    	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
    	at91_pio_t	*pio	= (at91_pio_t *) ATMEL_BASE_PIO;
    	at91_rstc_t	*rstc	= (at91_rstc_t *) ATMEL_BASE_RSTC;
    
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    	/* Enable clock */
    
    	writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
    
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    	/*
    	 * Disable pull-up on:
    	 *	RXDV (PC25) => PHY normal mode (not Test mode)
    	 * 	ERX0 (PE25) => PHY ADDR0
    	 *	ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
    	 *
    	 * PHY has internal pull-down
    	 */
    
    
    	writel(1 << 25, &pio->pioc.pudr);
    	writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
    
    	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
    
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    	/* Need to reset PHY -> 500ms reset */
    	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
    		AT91_RSTC_MR_URSTEN, &rstc->mr);
    
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    	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
    
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    	/* Wait for end hardware reset */
    
    	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
    		;
    
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    	/* Restore NRST value */
    
    	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
    
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    	/* Re-enable pull-up */
    
    	writel(1 << 25, &pio->pioc.puer);
    	writel((1 << 25) | (1 <<26), &pio->pioe.puer);
    
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    }
    #endif
    
    
    #ifdef CONFIG_LCD
    vidinfo_t panel_info = {
    	vl_col:		240,
    	vl_row:		320,
    	vl_clk:		4965000,
    	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
    			ATMEL_LCDC_INVFRAME_INVERTED,
    	vl_bpix:	3,
    	vl_tft:		1,
    	vl_hsync_len:	5,
    	vl_left_margin:	1,
    	vl_right_margin:33,
    	vl_vsync_len:	1,
    	vl_upper_margin:1,
    	vl_lower_margin:0,
    
    	at91_set_pio_value(AT91_PIO_PORTA, 30, 1);  /* power up */
    
    	at91_set_pio_value(AT91_PIO_PORTA, 30, 0);  /* power down */
    
    }
    
    static void at91sam9263ek_lcd_hw_init(void)
    {
    
    	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
    
    
    	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDHSYNC */
    	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDDOTCK */
    	at91_set_a_periph(AT91_PIO_PORTC, 3, 0);	/* LCDDEN */
    	at91_set_b_periph(AT91_PIO_PORTB, 9, 0);	/* LCDCC */
    	at91_set_a_periph(AT91_PIO_PORTC, 6, 0);	/* LCDD2 */
    	at91_set_a_periph(AT91_PIO_PORTC, 7, 0);	/* LCDD3 */
    	at91_set_a_periph(AT91_PIO_PORTC, 8, 0);	/* LCDD4 */
    	at91_set_a_periph(AT91_PIO_PORTC, 9, 0);	/* LCDD5 */
    	at91_set_a_periph(AT91_PIO_PORTC, 10, 0);	/* LCDD6 */
    	at91_set_a_periph(AT91_PIO_PORTC, 11, 0);	/* LCDD7 */
    	at91_set_a_periph(AT91_PIO_PORTC, 14, 0);	/* LCDD10 */
    	at91_set_a_periph(AT91_PIO_PORTC, 15, 0);	/* LCDD11 */
    	at91_set_a_periph(AT91_PIO_PORTC, 16, 0);	/* LCDD12 */
    	at91_set_b_periph(AT91_PIO_PORTC, 12, 0);	/* LCDD13 */
    	at91_set_a_periph(AT91_PIO_PORTC, 18, 0);	/* LCDD14 */
    	at91_set_a_periph(AT91_PIO_PORTC, 19, 0);	/* LCDD15 */
    	at91_set_a_periph(AT91_PIO_PORTC, 22, 0);	/* LCDD18 */
    	at91_set_a_periph(AT91_PIO_PORTC, 23, 0);	/* LCDD19 */
    	at91_set_a_periph(AT91_PIO_PORTC, 24, 0);	/* LCDD20 */
    	at91_set_b_periph(AT91_PIO_PORTC, 17, 0);	/* LCDD21 */
    	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDD22 */
    	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDD23 */
    
    
    	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
    	gd->fb_base = ATMEL_BASE_SRAM0;
    
    
    #ifdef CONFIG_LCD_INFO
    #include <nand.h>
    #include <version.h>
    
    
    #ifndef CONFIG_SYS_NO_FLASH
    extern flash_info_t flash_info[];
    #endif
    
    
    void lcd_show_board_info(void)
    {
    	ulong dram_size, nand_size;
    
    #ifndef CONFIG_SYS_NO_FLASH
    	ulong flash_size;
    #endif
    
    	int i;
    	char temp[32];
    
    	lcd_printf ("%s\n", U_BOOT_VERSION);
    	lcd_printf ("(C) 2008 ATMEL Corp\n");
    	lcd_printf ("at91support@atmel.com\n");
    	lcd_printf ("%s CPU at %s MHz\n",
    
    		strmhz(temp, get_cpu_clk_rate()));
    
    
    	dram_size = 0;
    	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
    		dram_size += gd->bd->bi_dram[i].size;
    	nand_size = 0;
    	for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
    		nand_size += nand_info[i].size;
    
    #ifndef CONFIG_SYS_NO_FLASH
    	flash_size = 0;
    	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
    		flash_size += flash_info[i].size;
    #endif
    	lcd_printf ("  %ld MB SDRAM, %ld MB NAND",
    
    		dram_size >> 20,
    		nand_size >> 20 );
    
    #ifndef CONFIG_SYS_NO_FLASH
    	lcd_printf (",\n  %ld MB NOR",
    		flash_size >> 20);
    #endif
    	lcd_puts ("\n");
    
    }
    #endif /* CONFIG_LCD_INFO */
    
    int board_early_init_f(void)
    {
    	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
    
    	/* Enable clocks for all PIOs */
    	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
    		(1 << ATMEL_ID_PIOCDE),
    		&pmc->pcer);
    
    
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    int board_init(void)
    {
    	/* arch number of AT91SAM9263EK-Board */
    	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
    	/* adress of boot parameters */
    
    	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
    
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    #ifdef CONFIG_CMD_NAND
    	at91sam9263ek_nand_hw_init();
    #endif
    #ifdef CONFIG_HAS_DATAFLASH
    
    	at91_set_pio_output(AT91_PIO_PORTE, 20, 1);	/* select spi0 clock */
    
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    #endif
    #ifdef CONFIG_MACB
    	at91sam9263ek_macb_hw_init();
    #endif
    #ifdef CONFIG_USB_OHCI_NEW
    
    #endif
    #ifdef CONFIG_LCD
    	at91sam9263ek_lcd_hw_init();
    
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    #endif
    	return 0;
    }
    
    int dram_init(void)
    {
    
    	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
    		CONFIG_SYS_SDRAM_SIZE);
    
    
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    	return 0;
    }
    
    #ifdef CONFIG_RESET_PHY_R
    void reset_phy(void)
    {
    }
    #endif
    
    
    int board_eth_init(bd_t *bis)
    {
    	int rc = 0;
    #ifdef CONFIG_MACB
    
    	rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);