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    /*------------------------------------------------------------------------
     . smc91111.c
     . This is a driver for SMSC's 91C111 single-chip Ethernet device.
     .
     . (C) Copyright 2002
     . Sysgo Real-Time Solutions, GmbH <www.elinos.com>
     . Rolf Offermanns <rof@sysgo.de>
     .
     . Copyright (C) 2001 Standard Microsystems Corporation (SMSC)
    
     .	 Developed by Simple Network Magic Corporation (SNMC)
    
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     . Copyright (C) 1996 by Erik Stahlman (ES)
     .
     . This program is free software; you can redistribute it and/or modify
     . it under the terms of the GNU General Public License as published by
     . the Free Software Foundation; either version 2 of the License, or
     . (at your option) any later version.
     .
     . This program is distributed in the hope that it will be useful,
     . but WITHOUT ANY WARRANTY; without even the implied warranty of
    
     . MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
    
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     . GNU General Public License for more details.
     .
     . You should have received a copy of the GNU General Public License
     . along with this program; if not, write to the Free Software
    
     . Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307	 USA
    
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     .
     . Information contained in this file was obtained from the LAN91C111
     . manual from SMC.  To get a copy, if you really want one, you can find
     . information under www.smsc.com.
     .
     .
     . "Features" of the SMC chip:
     .   Integrated PHY/MAC for 10/100BaseT Operation
     .   Supports internal and external MII
     .   Integrated 8K packet memory
     .   EEPROM interface for configuration
     .
     . Arguments:
    
     .	io	= for the base address
    
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     .	irq	= for the IRQ
     .
     . author:
    
     .	Erik Stahlman				( erik@vt.edu )
     .	Daris A Nevil				( dnevil@snmc.com )
    
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     .
     .
     . Hardware multicast code from Peter Cammaert ( pc@denkart.be )
     .
     . Sources:
    
     .    o	  SMSC LAN91C111 databook (www.smsc.com)
     .    o	  smc9194.c by Erik Stahlman
     .    o	  skeleton.c by Donald Becker ( becker@cesdis.gsfc.nasa.gov )
    
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     .
     . History:
    
     .	06/19/03  Richard Woodruff Made u-boot environment aware and added mac addr checks.
    
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     .	10/17/01  Marco Hasewinkel Modify for DNP/1110
    
     .	07/25/01  Woojung Huh	   Modify for ADS Bitsy
     .	04/25/01  Daris A Nevil	   Initial public release through SMSC
     .	03/16/01  Daris A Nevil	   Modified smc9194.c for use with LAN91C111
    
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     ----------------------------------------------------------------------------*/
    
    #include <common.h>
    #include <command.h>
    #include "smc91111.h"
    #include <net.h>
    
    #ifdef CONFIG_DRIVER_SMC91111
    
    /* Use power-down feature of the chip */
    #define POWER_DOWN	0
    
    #define NO_AUTOPROBE
    
    
    #define SMC_DEBUG 0
    
    #if SMC_DEBUG > 1
    
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    static const char version[] =
    	"smc91111.c:v1.0 04/25/01 by Daris A Nevil (dnevil@snmc.com)\n";
    
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    /*------------------------------------------------------------------------
     .
     . Configuration options, for the experienced user to change.
     .
     -------------------------------------------------------------------------*/
    
    /*
     . Wait time for memory to be free.  This probably shouldn't be
     . tuned that much, as waiting for this means nothing else happens
     . in the system
    */
    #define MEMORY_WAIT_TIME 16
    
    
    #if (SMC_DEBUG > 2 )
    #define PRINTK3(args...) printf(args)
    #else
    #define PRINTK3(args...)
    #endif
    
    #if SMC_DEBUG > 1
    #define PRINTK2(args...) printf(args)
    #else
    #define PRINTK2(args...)
    #endif
    
    #ifdef SMC_DEBUG
    #define PRINTK(args...) printf(args)
    #else
    #define PRINTK(args...)
    #endif
    
    
    /*------------------------------------------------------------------------
     .
    
     . The internal workings of the driver.	 If you are changing anything
    
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     . here with the SMC stuff, you should have the datasheet and know
     . what you are doing.
     .
     -------------------------------------------------------------------------*/
    #define CARDNAME "LAN91C111"
    
    /* Memory sizing constant */
    #define LAN91C111_MEMORY_MULTIPLIER	(1024*2)
    
    #ifndef CONFIG_SMC91111_BASE
    #define CONFIG_SMC91111_BASE 0x20000300
    #endif
    
    #define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
    
    #define SMC_DEV_NAME "SMC91111"
    #define SMC_PHY_ADDR 0x0000
    #define SMC_ALLOC_MAX_TRY 5
    #define SMC_TX_TIMEOUT 30
    
    #define SMC_PHY_CLOCK_DELAY 1000
    
    #define ETH_ZLEN 60
    
    
    #ifdef	CONFIG_SMC_USE_32_BIT
    
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    #define USE_32_BIT  1
    #else
    #undef USE_32_BIT
    #endif
    /*-----------------------------------------------------------------
     .
     .  The driver can be entered at any of the following entry points.
     .
     .------------------------------------------------------------------  */
    
    extern int eth_init(bd_t *bd);
    extern void eth_halt(void);
    extern int eth_rx(void);
    extern int eth_send(volatile void *packet, int length);
    
    
    /*
     . This is called by  register_netdev().  It is responsible for
     . checking the portlist for the SMC9000 series chipset.  If it finds
     . one, then it will initialize the device, find the hardware information,
     . and sets up the appropriate device parameters.
     . NOTE: Interrupts are *OFF* when this procedure is called.
     .
     . NB:This shouldn't be static since it is referred to externally.
    */
    int smc_init(void);
    
    /*
     . This is called by  unregister_netdev().  It is responsible for
     . cleaning up before the driver is finally unregistered and discarded.
    */
    void smc_destructor(void);
    
    /*
     . The kernel calls this function when someone wants to use the device,
     . typically 'ifconfig ethX up'.
    */
    
    static int smc_open(bd_t *bd);
    
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    /*
     . This is called by the kernel in response to 'ifconfig ethX down'.  It
     . is responsible for cleaning up everything that the open routine
     . does, and maybe putting the card into a powerdown state.
    */
    static int smc_close(void);
    
    /*
     . Configures the PHY through the MII Management interface
    */
    #ifndef CONFIG_SMC91111_EXT_PHY
    static void smc_phy_configure(void);
    #endif /* !CONFIG_SMC91111_EXT_PHY */
    
    /*
     . This is a separate procedure to handle the receipt of a packet, to
     . leave the interrupt code looking slightly cleaner
    */
    static int smc_rcv(void);
    
    
    /* See if a MAC address is defined in the current environment. If so use it. If not
    
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     . print a warning and set the environment and other globals with the default.
    
     . If an EEPROM is present it really should be consulted.
    */
    int smc_get_ethaddr(bd_t *bd);
    int get_rom_mac(char *v_rom_mac);
    
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    /*
     ------------------------------------------------------------
     .
     . Internal routines
     .
     ------------------------------------------------------------
    */
    
    
    static char unsigned smc_mac_addr[6] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8};
    
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    /*
     * This function must be called before smc_open() if you want to override
     * the default mac address.
     */
    
    void smc_set_mac_addr(const char *addr) {
    	int i;
    
    	for (i=0; i < sizeof(smc_mac_addr); i++){
    		smc_mac_addr[i] = addr[i];
    	}
    }
    
    /*
     * smc_get_macaddr is no longer used. If you want to override the default
    
     * mac address, call smc_get_mac_addr as a part of the board initialization.
    
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     */
    
    #if 0
    void smc_get_macaddr( byte *addr ) {
    	/* MAC ADDRESS AT FLASHBLOCK 1 / OFFSET 0x10 */
    
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    	unsigned char *dnp1110_mac = (unsigned char *) (0xE8000000 + 0x20010);
    
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    	int i;
    
    
    
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    	for (i=0; i<6; i++) {
    	    addr[0] = *(dnp1110_mac+0);
    	    addr[1] = *(dnp1110_mac+1);
    	    addr[2] = *(dnp1110_mac+2);
    	    addr[3] = *(dnp1110_mac+3);
    	    addr[4] = *(dnp1110_mac+4);
    	    addr[5] = *(dnp1110_mac+5);
    	}
    
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    }
    #endif /* 0 */
    
    /***********************************************
    
     * Show available memory		       *
    
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     ***********************************************/
    void dump_memory_info(void)
    {
    
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    	word mem_info;
    	word old_bank;
    
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    	old_bank = SMC_inw(BANK_SELECT)&0xF;
    
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    	SMC_SELECT_BANK(0);
    	mem_info = SMC_inw( MIR_REG );
    	PRINTK2("Memory: %4d available\n", (mem_info >> 8)*2048);
    
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    	SMC_SELECT_BANK(old_bank);
    
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    }
    /*
     . A rather simple routine to print out a packet for debugging purposes.
    */
    #if SMC_DEBUG > 2
    static void print_packet( byte *, int );
    #endif
    
    #define tx_done(dev) 1
    
    
    /* this does a soft reset on the device */
    static void smc_reset( void );
    
    /* Enable Interrupts, Receive, and Transmit */
    static void smc_enable( void );
    
    /* this puts the device in an inactive state */
    static void smc_shutdown( void );
    
    /* Routines to Read and Write the PHY Registers across the
       MII Management Interface
    */
    
    #ifndef CONFIG_SMC91111_EXT_PHY
    static word smc_read_phy_register(byte phyreg);
    static void smc_write_phy_register(byte phyreg, word phydata);
    #endif /* !CONFIG_SMC91111_EXT_PHY */
    
    
    
    static int poll4int (byte mask, int timeout)
    {
    	int tmo = get_timer (0) + timeout * CFG_HZ;
    	int is_timeout = 0;
    	word old_bank = SMC_inw (BSR_REG);
    
    	PRINTK2 ("Polling...\n");
    	SMC_SELECT_BANK (2);
    	while ((SMC_inw (SMC91111_INT_REG) & mask) == 0) {
    		if (get_timer (0) >= tmo) {
    			is_timeout = 1;
    			break;
    		}
    
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    	}
    
    
    	/* restore old bank selection */
    	SMC_SELECT_BANK (old_bank);
    
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    	if (is_timeout)
    		return 1;
    	else
    		return 0;
    
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    }
    
    
    /* Only one release command at a time, please */
    
    static inline void smc_wait_mmu_release_complete (void)
    
    	/* assume bank 2 selected */
    
    	while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
    		udelay (1);	/* Wait until not busy */
    		if (++count > 200)
    			break;
    
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    /*
     . Function: smc_reset( void )
     . Purpose:
    
     .	This sets the SMC91111 chip to its normal state, hopefully from whatever
     .	mess that any other DOS driver has put it in.
    
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     .
     . Maybe I should reset more registers to defaults in here?  SOFTRST  should
     . do that for me.
     .
     . Method:
     .	1.  send a SOFT RESET
     .	2.  wait for it to finish
     .	3.  enable autorelease mode
     .	4.  reset the memory management unit
     .	5.  clear all interrupts
     .
    */
    
    static void smc_reset (void)
    
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    {
    
    	PRINTK2 ("%s:smc_reset\n", SMC_DEV_NAME);
    
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    	/* This resets the registers mostly to defaults, but doesn't
    	   affect EEPROM.  That seems unnecessary */
    
    	SMC_SELECT_BANK (0);
    	SMC_outw (RCR_SOFTRST, RCR_REG);
    
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    	/* Setup the Configuration Register */
    	/* This is necessary because the CONFIG_REG is not affected */
    	/* by a soft reset */
    
    
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    #if defined(CONFIG_SMC91111_EXT_PHY)
    
    	SMC_outw (CONFIG_DEFAULT | CONFIG_EXT_PHY, CONFIG_REG);
    
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    #else
    
    	SMC_outw (CONFIG_DEFAULT, CONFIG_REG);
    
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    #endif
    
    
    	/* Release from possible power-down state */
    	/* Configuration register is not affected by Soft Reset */
    
    	SMC_outw (SMC_inw (CONFIG_REG) | CONFIG_EPH_POWER_EN, CONFIG_REG);
    
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    	/* this should pause enough for the chip to be happy */
    
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    	/* Disable transmit and receive functionality */
    
    	SMC_outw (RCR_CLEAR, RCR_REG);
    	SMC_outw (TCR_CLEAR, TCR_REG);
    
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    	/* set the control register */
    
    	SMC_SELECT_BANK (1);
    	SMC_outw (CTL_DEFAULT, CTL_REG);
    
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    	/* Reset the MMU */
    
    	SMC_SELECT_BANK (2);
    	smc_wait_mmu_release_complete ();
    	SMC_outw (MC_RESET, MMU_CMD_REG);
    	while (SMC_inw (MMU_CMD_REG) & MC_BUSY)
    		udelay (1);	/* Wait until not busy */
    
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    	/* Note:  It doesn't seem that waiting for the MMU busy is needed here,
    	   but this is a place where future chipsets _COULD_ break.  Be wary
    
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    	   of issuing another MMU command right after this */
    
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    	/* Disable all interrupts */
    
    	SMC_outb (0, IM_REG);
    
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    }
    
    /*
     . Function: smc_enable
     . Purpose: let the chip talk to the outside work
     . Method:
     .	1.  Enable the transmitter
     .	2.  Enable the receiver
     .	3.  Enable interrupts
    */
    static void smc_enable()
    {
    	PRINTK2("%s:smc_enable\n", SMC_DEV_NAME);
    	SMC_SELECT_BANK( 0 );
    	/* see the header file for options in TCR/RCR DEFAULT*/
    	SMC_outw( TCR_DEFAULT, TCR_REG );
    	SMC_outw( RCR_DEFAULT, RCR_REG );
    
    	/* clear MII_DIS */
    /*	smc_write_phy_register(PHY_CNTL_REG, 0x0000); */
    }
    
    /*
     . Function: smc_shutdown
     . Purpose:  closes down the SMC91xxx chip.
     . Method:
     .	1. zero the interrupt mask
     .	2. clear the enable receive flag
     .	3. clear the enable xmit flags
     .
     . TODO:
     .   (1) maybe utilize power down mode.
     .	Why not yet?  Because while the chip will go into power down mode,
     .	the manual says that it will wake up in response to any I/O requests
    
     .	in the register space.	 Empirical results do not show this working.
    
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    */
    static void smc_shutdown()
    {
    	PRINTK2(CARDNAME ":smc_shutdown\n");
    
    	/* no more interrupts for me */
    	SMC_SELECT_BANK( 2 );
    	SMC_outb( 0, IM_REG );
    
    	/* and tell the card to stay away from that nasty outside world */
    	SMC_SELECT_BANK( 0 );
    	SMC_outb( RCR_CLEAR, RCR_REG );
    	SMC_outb( TCR_CLEAR, TCR_REG );
    }
    
    
    /*
     . Function:  smc_hardware_send_packet(struct net_device * )
     . Purpose:
     .	This sends the actual packet to the SMC9xxx chip.
     .
     . Algorithm:
    
     .	First, see if a saved_skb is available.
    
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     .		( this should NOT be called if there is no 'saved_skb'
     .	Now, find the packet number that the chip allocated
     .	Point the data pointers at it in memory
     .	Set the length word in the chip's memory
     .	Dump the packet to chip memory
     .	Check if a last byte is needed ( odd length packet )
     .		if so, set the control flag right
    
     .	Tell the card to send it
    
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     .	Enable the transmit interrupt, so I know if it failed
    
     .	Free the kernel data if I actually sent it.
    
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    */
    
    static int smc_send_packet (volatile void *packet, int packet_length)
    
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    {
    
    	byte packet_no;
    	unsigned long ioaddr;
    	byte *buf;
    	int length;
    	int numPages;
    	int try = 0;
    	int time_out;
    	byte status;
    
    	PRINTK3 ("%s:smc_hardware_send_packet\n", SMC_DEV_NAME);
    
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    	length = ETH_ZLEN < packet_length ? packet_length : ETH_ZLEN;
    
    	/* allocate memory
    
    	 ** The MMU wants the number of pages to be the number of 256 bytes
    	 ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) )
    	 **
    	 ** The 91C111 ignores the size bits, but the code is left intact
    	 ** for backwards and future compatibility.
    	 **
    	 ** Pkt size for allocating is data length +6 (for additional status
    	 ** words, length and ctl!)
    	 **
    	 ** If odd size then last byte is included in this header.
    	 */
    	numPages = ((length & 0xfffe) + 6);
    	numPages >>= 8;		/* Divide by 256 */
    
    	if (numPages > 7) {
    		printf ("%s: Far too big packet error. \n", SMC_DEV_NAME);
    
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    		return 0;
    	}
    
    	/* now, try to allocate the memory */
    
    	SMC_SELECT_BANK (2);
    	SMC_outw (MC_ALLOC | numPages, MMU_CMD_REG);
    
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    	/* FIXME: the ALLOC_INT bit never gets set *
    
    	 * so the following will always give a	   *
    	 * memory allocation error.		   *
    	 * same code works in armboot though	   *
    
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    again:
    	try++;
    	time_out = MEMORY_WAIT_TIME;
    	do {
    
    		status = SMC_inb (SMC91111_INT_REG);
    		if (status & IM_ALLOC_INT) {
    
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    			/* acknowledge the interrupt */
    
    			SMC_outb (IM_ALLOC_INT, SMC91111_INT_REG);
    
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    			break;
    
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    		}
    
    	} while (--time_out);
    
    	if (!time_out) {
    		PRINTK2 ("%s: memory allocation, try %d failed ...\n",
    			 SMC_DEV_NAME, try);
    		if (try < SMC_ALLOC_MAX_TRY)
    			goto again;
    		else
    			return 0;
    
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    	}
    
    
    	PRINTK2 ("%s: memory allocation, try %d succeeded ...\n",
    		 SMC_DEV_NAME, try);
    
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    	/* I can send the packet now.. */
    
    	ioaddr = SMC_BASE_ADDRESS;
    
    
    	buf = (byte *) packet;
    
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    	/* If I get here, I _know_ there is a packet slot waiting for me */
    
    	packet_no = SMC_inb (AR_REG);
    	if (packet_no & AR_FAILED) {
    
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    		/* or isn't there?  BAD CHIP! */
    
    		printf ("%s: Memory allocation failed. \n", SMC_DEV_NAME);
    
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    		return 0;
    	}
    
    	/* we have a packet address, so tell the card to use it */
    
    	SMC_outb (packet_no, PN_REG);
    
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    	/* point to the beginning of the packet */
    
    	SMC_outw (PTR_AUTOINC, PTR_REG);
    
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    	PRINTK3 ("%s: Trying to xmit packet of length %x\n",
    		 SMC_DEV_NAME, length);
    
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    #if SMC_DEBUG > 2
    
    	printf ("Transmitting Packet\n");
    	print_packet (buf, length);
    
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    #endif
    
    	/* send the packet length ( +6 for status, length and ctl byte )
    
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    	   and the status word ( set to zeros ) */
    
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    #ifdef USE_32_BIT
    
    	SMC_outl ((length + 6) << 16, SMC91111_DATA_REG);
    
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    #else
    
    	SMC_outw (0, SMC91111_DATA_REG);
    	/* send the packet length ( +6 for status words, length, and ctl */
    	SMC_outw ((length + 6), SMC91111_DATA_REG);
    
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    #endif
    
    	/* send the actual data
    
    	   . I _think_ it's faster to send the longs first, and then
    	   . mop up by sending the last word.  It depends heavily
    
    	   . on alignment, at least on the 486.	 Maybe it would be
    
    	   . a good idea to check which is optimal?  But that could take
    	   . almost as much time as is saved?
    	 */
    
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    #ifdef USE_32_BIT
    
    	SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
    	if (length & 0x2)
    		SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
    			  SMC91111_DATA_REG);
    
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    #else
    
    	SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
    
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    #endif /* USE_32_BIT */
    
    
    	/* Send the last byte, if there is one.	  */
    
    	if ((length & 1) == 0) {
    		SMC_outw (0, SMC91111_DATA_REG);
    
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    	} else {
    
    		SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
    
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    	}
    
    	/* and let the chipset deal with it */
    
    	SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
    
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    	/* poll for TX INT */
    
    	if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) {
    
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    		/* sending failed */
    
    		PRINTK2 ("%s: TX timeout, sending failed...\n", SMC_DEV_NAME);
    
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    		/* release packet */
    
    		SMC_outw (MC_FREEPKT, MMU_CMD_REG);
    
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    		/* wait for MMU getting ready (low) */
    
    		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
    			udelay (10);
    
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    		}
    
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    		PRINTK2 ("MMU ready\n");
    
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    		return 0;
    	} else {
    		/* ack. int */
    
    		SMC_outb (IM_TX_INT, SMC91111_INT_REG);
    
    		PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME,
    			 length);
    
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    		/* release packet */
    
    		SMC_outw (MC_FREEPKT, MMU_CMD_REG);
    
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    		/* wait for MMU getting ready (low) */
    
    		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
    			udelay (10);
    
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    		}
    
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    		PRINTK2 ("MMU ready\n");
    
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    	}
    
    	return length;
    }
    
    /*-------------------------------------------------------------------------
     |
     | smc_destructor( struct net_device * dev )
     |   Input parameters:
     |	dev, pointer to the device structure
     |
     |   Output:
     |	None.
     |
     ---------------------------------------------------------------------------
    */
    void smc_destructor()
    {
    	PRINTK2(CARDNAME ":smc_destructor\n");
    }
    
    
    /*
     * Open and Initialize the board
     *
     * Set up everything, reset the card, etc ..
     *
     */
    
    static int smc_open (bd_t * bd)
    
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    {
    
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    	PRINTK2 ("%s:smc_open\n", SMC_DEV_NAME);
    
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    	/* reset the hardware */
    
    	smc_reset ();
    	smc_enable ();
    
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    	/* Configure the PHY */
    #ifndef CONFIG_SMC91111_EXT_PHY
    
    	smc_phy_configure ();
    
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    #endif
    
    	/* conservative setting (10Mbps, HalfDuplex, no AutoNeg.) */
    /*	SMC_SELECT_BANK(0); */
    /*	SMC_outw(0, RPC_REG); */
    
    	err = smc_get_ethaddr (bd);	/* set smc_mac_addr, and sync it with u-boot globals */
    	if (err < 0) {
    
    		memset (bd->bi_enetaddr, 0, 6); /* hack to make error stick! upper code will abort if not set */
    
    		return (-1);	/* upper code ignores this, but NOT bi_enetaddr */
    	}
    
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    #ifdef USE_32_BIT
    
    	for (i = 0; i < 6; i += 2) {
    
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    		word address;
    
    
    		address = smc_mac_addr[i + 1] << 8;
    		address |= smc_mac_addr[i];
    		SMC_outw (address, ADDR0_REG + i);
    
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    	}
    #else
    
    	for (i = 0; i < 6; i++)
    		SMC_outb (smc_mac_addr[i], ADDR0_REG + i);
    
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    #endif
    
    	return 0;
    }
    
    /*-------------------------------------------------------------
     .
     . smc_rcv -  receive a packet from the card
     .
     . There is ( at least ) a packet waiting to be read from
     . chip-memory.
     .
     . o Read the status
     . o If an error, record it
     . o otherwise, read in the packet
     --------------------------------------------------------------
    */
    static int smc_rcv()
    {
    
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    	word	status;
    	word	packet_length;
    
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    #ifdef USE_32_BIT
    	dword stat_len;
    #endif
    
    	SMC_SELECT_BANK(2);
    	packet_number = SMC_inw( RXFIFO_REG );
    
    	if ( packet_number & RXFIFO_REMPTY ) {
    
    		return 0;
    	}
    
    	PRINTK3("%s:smc_rcv\n", SMC_DEV_NAME);
    	/*  start reading from the start of the packet */
    	SMC_outw( PTR_READ | PTR_RCV | PTR_AUTOINC, PTR_REG );
    
    	/* First two words are status and packet_length */
    #ifdef USE_32_BIT
    	stat_len = SMC_inl(SMC91111_DATA_REG);
    	status = stat_len & 0xffff;
    	packet_length = stat_len >> 16;
    #else
    
    	status		= SMC_inw( SMC91111_DATA_REG );
    	packet_length	= SMC_inw( SMC91111_DATA_REG );
    
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    #endif
    
    	packet_length &= 0x07ff;  /* mask off top bits */
    
    	PRINTK2("RCV: STATUS %4x LENGTH %4x\n", status, packet_length );
    
    	if ( !(status & RS_ERRORS ) ){
    		/* Adjust for having already read the first two words */
    		packet_length -= 4; /*4; */
    
    
    		/* set odd length for bug in LAN91C111, */
    		/* which never sets RS_ODDFRAME */
    		/* TODO ? */
    
    
    #ifdef USE_32_BIT
    		PRINTK3(" Reading %d dwords (and %d bytes) \n",
    			packet_length >> 2, packet_length & 3 );
    		/* QUESTION:  Like in the TX routine, do I want
    		   to send the DWORDs or the bytes first, or some
    		   mixture.  A mixture might improve already slow PIO
    
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    		SMC_insl( SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 2 );
    		/* read the left over bytes */
    		if (packet_length & 3) {
    			int i;
    
    
    			byte *tail = (byte *)(NetRxPackets[0] + (packet_length & ~3));
    
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    			dword leftover = SMC_inl(SMC91111_DATA_REG);
    			for (i=0; i<(packet_length & 3); i++)
    				*tail++ = (byte) (leftover >> (8*i)) & 0xff;
    		}
    #else
    		PRINTK3(" Reading %d words and %d byte(s) \n",
    			(packet_length >> 1 ), packet_length & 1 );
    		SMC_insw(SMC91111_DATA_REG , NetRxPackets[0], packet_length >> 1);
    
    #endif /* USE_32_BIT */
    
    #if	SMC_DEBUG > 2
    		printf("Receiving Packet\n");
    		print_packet( NetRxPackets[0], packet_length );
    #endif
    	} else {
    		/* error ... */
    		/* TODO ? */
    		is_error = 1;
    	}
    
    	while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY )
    		udelay(1); /* Wait until not busy */
    
    	/*  error or good, tell the card to get rid of this packet */
    	SMC_outw( MC_RELEASE, MMU_CMD_REG );
    
    	while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY )
    		udelay(1); /* Wait until not busy */
    
    	if (!is_error) {
    		/* Pass the packet up to the protocol layers. */
    		NetReceive(NetRxPackets[0], packet_length);
    		return packet_length;
    	} else {
    		return 0;
    	}
    
    }
    
    
    /*----------------------------------------------------
     . smc_close
     .
     . this makes the board clean up everything that it can
    
     . and not talk to the outside world.	Caused by
    
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     . an 'ifconfig ethX down'
     .
     -----------------------------------------------------*/
    static int smc_close()
    {
    	PRINTK2("%s:smc_close\n", SMC_DEV_NAME);
    
    	/* clear everything */
    	smc_shutdown();
    
    	return 0;
    }
    
    
    #if 0
    /*------------------------------------------------------------
     . Modify a bit in the LAN91C111 register set
     .-------------------------------------------------------------*/
    static word smc_modify_regbit(int bank, int ioaddr, int reg,
    	unsigned int bit, int val)
    {
    	word regval;
    
    	SMC_SELECT_BANK( bank );
    
    	regval = SMC_inw( reg );
    	if (val)
    		regval |= bit;
    	else
    		regval &= ~bit;
    
    	SMC_outw( regval, 0 );
    	return(regval);
    }
    
    
    /*------------------------------------------------------------
     . Retrieve a bit in the LAN91C111 register set
     .-------------------------------------------------------------*/
    static int smc_get_regbit(int bank, int ioaddr, int reg, unsigned int bit)
    {
    	SMC_SELECT_BANK( bank );
    	if ( SMC_inw( reg ) & bit)
    		return(1);
    	else
    		return(0);
    }
    
    
    /*------------------------------------------------------------
     . Modify a LAN91C111 register (word access only)
     .-------------------------------------------------------------*/
    static void smc_modify_reg(int bank, int ioaddr, int reg, word val)
    {
    	SMC_SELECT_BANK( bank );
    	SMC_outw( val, reg );
    }
    
    
    /*------------------------------------------------------------
     . Retrieve a LAN91C111 register (word access only)
     .-------------------------------------------------------------*/
    static int smc_get_reg(int bank, int ioaddr, int reg)
    {
    	SMC_SELECT_BANK( bank );
    	return(SMC_inw( reg ));
    }
    
    #endif /* 0 */
    
    /*---PHY CONTROL AND CONFIGURATION----------------------------------------- */
    
    #if (SMC_DEBUG > 2 )
    
    /*------------------------------------------------------------
     . Debugging function for viewing MII Management serial bitstream
     .-------------------------------------------------------------*/
    
    static void smc_dump_mii_stream (byte * bits, int size)
    
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    {
    	int i;
    
    
    	printf ("BIT#:");
    	for (i = 0; i < size; ++i) {
    		printf ("%d", i % 10);
    	}
    
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    	printf ("\nMDOE:");
    	for (i = 0; i < size; ++i) {
    
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    		if (bits[i] & MII_MDOE)
    
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    		else
    
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    	printf ("\nMDO :");
    	for (i = 0; i < size; ++i) {
    
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    		if (bits[i] & MII_MDO)
    
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    		else
    
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    	printf ("\nMDI :");
    	for (i = 0; i < size; ++i) {
    
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    		if (bits[i] & MII_MDI)
    
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    		else
    
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    }
    #endif
    
    /*------------------------------------------------------------
     . Reads a register from the MII Management serial interface
     .-------------------------------------------------------------*/
    #ifndef CONFIG_SMC91111_EXT_PHY
    
    static word smc_read_phy_register (byte phyreg)
    
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    {
    	int oldBank;
    	int i;
    	byte mask;
    	word mii_reg;
    	byte bits[64];
    	int clk_idx = 0;
    	int input_idx;
    	word phydata;
    	byte phyaddr = SMC_PHY_ADDR;
    
    	/* 32 consecutive ones on MDO to establish sync */
    	for (i = 0; i < 32; ++i)
    		bits[clk_idx++] = MII_MDOE | MII_MDO;
    
    	/* Start code <01> */
    	bits[clk_idx++] = MII_MDOE;
    	bits[clk_idx++] = MII_MDOE | MII_MDO;
    
    	/* Read command <10> */
    	bits[clk_idx++] = MII_MDOE | MII_MDO;
    	bits[clk_idx++] = MII_MDOE;
    
    	/* Output the PHY address, msb first */
    
    	mask = (byte) 0x10;
    	for (i = 0; i < 5; ++i) {
    
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    		if (phyaddr & mask)
    			bits[clk_idx++] = MII_MDOE | MII_MDO;
    		else
    			bits[clk_idx++] = MII_MDOE;
    
    		/* Shift to next lowest bit */
    		mask >>= 1;
    
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    	/* Output the phy register number, msb first */
    
    	mask = (byte) 0x10;
    	for (i = 0; i < 5; ++i) {
    
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    		if (phyreg & mask)
    			bits[clk_idx++] = MII_MDOE | MII_MDO;
    		else
    			bits[clk_idx++] = MII_MDOE;
    
    		/* Shift to next lowest bit */
    		mask >>= 1;
    
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    	/* Tristate and turnaround (2 bit times) */
    	bits[clk_idx++] = 0;
    	/*bits[clk_idx++] = 0; */
    
    	/* Input starts at this bit time */
    	input_idx = clk_idx;