tsi108_eth.c

	}
	/* remember where we are for next time */
	rx_descr_current = rx_descr;

	/* If the DMA engine has reached the end of the queue
	 * start over at the begining */
	if (reg_RX_EXTENDED_STATUS(base) & RX_EXTENDED_STATUS_EOQ_0) {

		reg_RX_EXTENDED_STATUS(base) = RX_EXTENDED_STATUS_EOQ_0;
		reg_RX_QUEUE_0_PTR_LOW(base) = (u32) & rx_descr_array[0];
		reg_RX_QUEUE_0_PTR_HIGH(base) = RX_QUEUE_0_PTR_HIGH_VALID;
	}

	return length;
}

/*
 * disable an ethernet interface
 */
static void tsi108_eth_halt (struct eth_device *dev)
{
	unsigned long base;

	base = dev->iobase;

	/* Put DMA/FIFO into reset state. */
	reg_TX_CONFIG(base) = TX_CONFIG_RST;
	reg_RX_CONFIG(base) = RX_CONFIG_RST;

	/* Put MAC into reset state. */
	reg_MAC_CONFIG_1(base) = MAC_CONFIG_1_SOFT_RESET;
}