1. 27 Oct, 2021 2 commits
  2. 11 Oct, 2021 3 commits
  3. 07 Oct, 2021 1 commit
  4. 05 Oct, 2021 1 commit
  5. 03 Oct, 2021 1 commit
    • alainlou's avatar
      cleanup and ease of use · 1b676f92
      alainlou authored
      - update README
      - delete some unnecessary toolchain commands (copied from trenz boards)
      - use minimal cpu_variant by default when vexriscv is selected
      1b676f92
  6. 01 Oct, 2021 2 commits
  7. 30 Sep, 2021 10 commits
  8. 29 Sep, 2021 1 commit
  9. 28 Sep, 2021 1 commit
  10. 27 Sep, 2021 1 commit
  11. 24 Sep, 2021 1 commit
    • Benjamin Herrenschmidt's avatar
      Wukong board improvements · 4a529961
      Benjamin Herrenschmidt authored
      
      
      This adds support for v2 of the board via a --board-version argument
      and a way to select the FPGA speed grade via a --speed-grade argument.
      
      Note that the speed grade now defaults to -1. QMTech confirmed that
      V1 of the board were made in two batches, one with -1 and one with -2,
      while V2 of the board is all -1. So -1 is the safer default.
      
      This also fixes the inversion of j10 and j11 and a typo in the pin
      definition of jp3
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4a529961
  12. 23 Sep, 2021 3 commits
  13. 22 Sep, 2021 1 commit
  14. 21 Sep, 2021 1 commit
  15. 20 Sep, 2021 4 commits
  16. 17 Sep, 2021 2 commits
    • Florent Kermarrec's avatar
    • Florent Kermarrec's avatar
      sipeed_tang_nano: Add SPI Flash, Enable CPU and use new external SPI Flash... · 376a8365
      Florent Kermarrec authored
      sipeed_tang_nano: Add SPI Flash, Enable CPU and use new external SPI Flash support from OpenFPGALoader.
      
      ./sipeed_tang_nano_4k.py --cpu-type=vexriscv --cpu-variant=lite --build --flash
      
              __   _ __      _  __
             / /  (_) /____ | |/_/
            / /__/ / __/ -_)>  <
           /____/_/\__/\__/_/|_|
         Build your hardware, easily!
      
       (c) Copyright 2012-2021 Enjoy-Digital
       (c) Copyright 2007-2015 M-Labs
      
       BIOS built on Sep 17 2021 15:54:08
       BIOS CRC passed (6cc6de6d)
      
       Migen git sha1: a5bc262
       LiteX git sha1: 46cd9c5a
      
      --=============== SoC ==================--
      CPU:		VexRiscv_Lite @ 27MHz
      BUS:		WISHBONE 32-bit @ 4GiB
      CSR:		32-bit data
      ROM:		64KiB
      SRAM:		8KiB
      FLASH:		4096KiB
      
      --========== Initialization ============--
      
      Initializing W25Q32 SPI Flash @0x80000000...
      SPI Flash clk configured to 13 MHz
      Memspeed at 0x80000000 (Sequential, 4.0KiB)...
         Read speed: 1.3MiB/s
      Memspeed at 0x80000000 (Random, 4.0KiB)...
         Read speed: 521.9KiB/s
      
      --============== Boot ==================--
      Booting from serial...
      Press Q or ESC to abort boot completely.
      sL5DdSMmkekro
      Timeout
      No boot medium found
      
      --============= Console ================--
      
      litex>
      376a8365
  17. 16 Sep, 2021 5 commits