From edcc2cf63e95016ef217adc864fbd6335046e577 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec <florent@enjoy-digital.fr> Date: Thu, 27 Feb 2020 11:17:28 +0100 Subject: [PATCH] test_targets: add vc707, zcu104, vcu118 and colorlight_5a_75b --- test/test_targets.py | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/test/test_targets.py b/test/test_targets.py index 8f7ada1..0ff2d03 100644 --- a/test/test_targets.py +++ b/test/test_targets.py @@ -52,9 +52,18 @@ class TestTargets(unittest.TestCase): platforms.append("kx2") platforms.append("nereid") + # Xilinx Virtex7 + platforms.append("vc707") + # Xilinx Kintex Ultrascale platforms.append("kcu105") + # Xilinx Zynq Ultrascale+ + platforms.append("zcu104") + + # Xilinx Virtex Ultrascale+ + platforms.append("vcu118") + # Intel Cyclone4 platforms.append("de0nano") platforms.append("de2_115") @@ -85,6 +94,7 @@ class TestTargets(unittest.TestCase): platforms.append("trellisboard") platforms.append("ulx3s") platforms.append("versa_ecp5") + platforms.append("colorlight_5a_75b") # Microsemi PolarFire platforms.append("avalanche") -- GitLab