diff --git a/litex_boards/platforms/muselab_icesugar.py b/litex_boards/platforms/muselab_icesugar.py
index 2285727eb9728a343c7281676a4635535388673b..a18d43e1b6f4fb914c64ac6e162644f74002475b 100644
--- a/litex_boards/platforms/muselab_icesugar.py
+++ b/litex_boards/platforms/muselab_icesugar.py
@@ -4,8 +4,7 @@
 # Copyright (c) 2021 Hans Baier <hansfbaier@gmail.com>
 # SPDX-License-Identifier: BSD-2-Clause
 
-# iCESugar FPGA:
-# https://www.aliexpress.com/item/4001201771358.html
+# iCESugar FPGA: https://www.aliexpress.com/item/4001201771358.html
 
 from litex.build.generic_platform import *
 from litex.build.lattice import LatticePlatform
@@ -55,17 +54,11 @@ _io = [
 # Connectors ---------------------------------------------------------------------------------------
 
 _connectors = [
-    # I chose the pin order such that it is the
-    # same as on the iCEBreaker so that its PMODs
-    # can be reused with this board
+    # Pin order similar to iCEBreaker to allow PMODs reuse.
     ("PMOD1", "10  6  3 48  9  4  2 47"),
     ("PMOD2", "46 44 42 37 45 43 38 36"),
     ("PMOD3", "34 31 27 25 32 28 26 23"),
-
-    # numbering similar to the pmods:
-    # 0 is marked pin, parallel rows
-    # notice that all those pins are also connected to PMOD1
-    ("J7", "48 - 3 47 - 2"),
+    ("J7",    "48 - 3 47 - 2"), # Numbering similar to PMODS: 0: Marked pin.
 ]
 
 # PMODS --------------------------------------------------------------------------------------------
@@ -73,7 +66,7 @@ _connectors = [
 def led_pmod_io_v11(pmod, offset=0):
     return [
         # LED PMOD: https://www.aliexpress.com/item/1005001504777342.html
-        # contrary to the supplied schematic, the two nibbles seem to be swapped on the board
+        # Contrary to the supplied schematic, the two nibbles seem to be swapped on the board.
         ("user_led_n", offset + 0,  Pins(f"{pmod}:4"), IOStandard("LVCMOS33")),
         ("user_led_n", offset + 1,  Pins(f"{pmod}:5"), IOStandard("LVCMOS33")),
         ("user_led_n", offset + 2,  Pins(f"{pmod}:6"), IOStandard("LVCMOS33")),
diff --git a/litex_boards/targets/muselab_icesugar.py b/litex_boards/targets/muselab_icesugar.py
index db541b6f29b35aa2b855d7c14b86f1c5fa87ce48..3383b16e6bb40b806756fd5e8fbc55aa67729d4d 100644
--- a/litex_boards/targets/muselab_icesugar.py
+++ b/litex_boards/targets/muselab_icesugar.py
@@ -6,8 +6,7 @@
 # Copyright (c) 2021 Hans Baier <hansfbaier@gmail.com>
 # SPDX-License-Identifier: BSD-2-Clause
 
-# iCESugar FPGA:
-# https://www.aliexpress.com/item/4001201771358.html
+# iCESugar FPGA: https://www.aliexpress.com/item/4001201771358.html
 
 import os
 import argparse