From bf5fdb7f32ad73c76ec2a9d3817a11c9002aae5f Mon Sep 17 00:00:00 2001
From: mntmn <lukas@mntmn.com>
Date: Thu, 30 Jul 2020 23:22:45 +0200
Subject: [PATCH] reform2/dts: enable SPI2; disable internal RTC in favor of
motherboard one
---
.../template-kernel/imx8mq-mnt-reform2.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/reform2-imx8mq/template-kernel/imx8mq-mnt-reform2.dts b/reform2-imx8mq/template-kernel/imx8mq-mnt-reform2.dts
index 51cd940..6b2567d 100644
--- a/reform2-imx8mq/template-kernel/imx8mq-mnt-reform2.dts
+++ b/reform2-imx8mq/template-kernel/imx8mq-mnt-reform2.dts
@@ -236,6 +236,16 @@
>;
};
+ // DSE = 45ohms, SRE = FAST, LVTTL = 1
+ pinctrl_ecspi2: ecspi2grp {
+ fsl.pins = <
+ MX8MQ_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x116
+ MX8MQ_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x116
+ MX8MQ_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x116
+ MX8MQ_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x116
+ >;
+ };
+
pinctrl_pcie0: pcie0grp {
fsl,pins = <
#define GP_PCIE0_RESET <&gpio5 7 GPIO_ACTIVE_LOW>
@@ -852,6 +862,11 @@
};
};
+// we use our own RTC instead
+&snvs_rtc {
+ status = "disabled";
+};
+
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
@@ -915,3 +930,9 @@
};
};
};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ status = "okay";
+};
--
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