arch/arc/dts/emdk.dts

+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		console = &uart0;
+	};
+
+	cpu_card {
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <40000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	uart0: serial0@f0004000 {
+		compatible = "snps,dw-apb-uart";
+		clock-frequency = <100000000>;
+		reg = <0xf0004000 0x1000>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+};

arch/arc/dts/hsdk.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include "dt-bindings/clock/snps,hsdk-cgu.h"
 
 / {
 	#address-cells = <1>;
@@ -13,6 +13,7 @@
 
 	aliases {
 		console = &uart0;
+		spi0 = &spi0;
 	};
 
 	cpu_card {
@@ -24,6 +25,41 @@
 		};
 	};
 
+	clk-fmeas {
+		clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
+			 <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
+			 <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
+			 <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
+			 <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
+			 <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
+			 <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
+			 <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
+			 <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
+			 <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
+			 <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
+			 <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
+			 <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
+		clock-names = "cpu-pll", "sys-pll",
+			      "tun-pll", "ddr-clk",
+			      "cpu-clk", "hdmi-pll",
+			      "tun-clk", "hdmi-clk",
+			      "apb-clk", "axi-clk",
+			      "eth-clk", "usb-clk",
+			      "sdio-clk", "hdmi-sys-clk",
+			      "gfx-core-clk", "gfx-dma-clk",
+			      "gfx-cfg-clk", "dmac-core-clk",
+			      "dmac-cfg-clk", "sdio-ref-clk",
+			      "spi-clk", "i2c-clk",
+			      "uart-clk", "ebi-clk",
+			      "rom-clk", "pwm-clk";
+	};
+
+	cgu_clk: cgu-clk@f0000000 {
+		compatible = "snps,hsdk-cgu-clock";
+		reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
+		#clock-cells = <1>;
+	};
+
 	uart0: serial0@f0005000 {
 		compatible = "snps,dw-apb-uart";
 		reg = <0xf0005000 0x1000>;
@@ -47,4 +83,29 @@
 		compatible = "generic-ohci";
 		reg = <0xf0060000 0x100>;
 	};
+
+	spi0: spi@f0020000 {
+		compatible = "snps,dw-apb-ssi";
+		reg = <0xf0020000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		spi-max-frequency = <4000000>;
+		clocks = <&cgu_clk CLK_SYS_SPI_REF>;
+		clock-names = "spi_clk";
+		cs-gpio = <&cs_gpio 0>;
+		spi_flash@0 {
+			compatible = "spi-flash";
+			reg = <0>;
+			spi-max-frequency = <4000000>;
+		};
+	};
+
+	cs_gpio: gpio@f00014b0 {
+		compatible = "snps,hsdk-creg-gpio";
+		reg = <0xf00014b0 0x4>;
+		gpio-controller;
+		#gpio-cells = <1>;
+		gpio-bank-name = "hsdk-spi-cs";
+		gpio-count = <1>;
+	};
 };

arch/arc/dts/nsim.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/include/asm/arc-bcr.h

+/*
+ * ARC Build Configuration Registers, with encoded hardware config
+ *
+ * Copyright (C) 2018 Synopsys
+ * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ARC_BCR_H
+#define __ARC_BCR_H
+#ifndef __ASSEMBLY__
+
+#include <config.h>
+
+union bcr_di_cache {
+	struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+		unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
+#else
+		unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
+#endif
+	} fields;
+	unsigned int word;
+};
+
+union bcr_slc_cfg {
+	struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+		unsigned int pad:24, way:2, lsz:2, sz:4;
+#else
+		unsigned int sz:4, lsz:2, way:2, pad:24;
+#endif
+	} fields;
+	unsigned int word;
+};
+
+union bcr_generic {
+	struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+		unsigned int pad:24, ver:8;
+#else
+		unsigned int ver:8, pad:24;
+#endif
+	} fields;
+	unsigned int word;
+};
+
+union bcr_clust_cfg {
+	struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+		unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
+#else
+		unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
+#endif
+	} fields;
+	unsigned int word;
+};
+
+union bcr_mmu_4 {
+	struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+	unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
+		     n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
+#else
+	/*           DTLB      ITLB      JES        JE         JA      */
+	unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
+		     pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
+#endif
+	} fields;
+	unsigned int word;
+};
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARC_BCR_H */

arch/arc/include/asm/arcregs.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _ASM_ARC_ARCREGS_H
 #define _ASM_ARC_ARCREGS_H
 
 #include <asm/cache.h>
+#include <config.h>
 
 /*
  * ARC architecture has additional address space - auxiliary registers.
@@ -27,6 +27,12 @@
 #define ARC_AUX_IC_PTAG		0x1E
 #endif
 #define ARC_BCR_IC_BUILD	0x77
+#define AUX_AUX_CACHE_LIMIT		0x5D
+#define ARC_AUX_NON_VOLATILE_LIMIT	0x5E
+
+/* ICCM and DCCM auxiliary registers */
+#define ARC_AUX_DCCM_BASE	0x18	/* DCCM Base Addr ARCv2 */
+#define ARC_AUX_ICCM_BASE	0x208	/* ICCM Base Addr ARCv2 */
 
 /* Timer related auxiliary registers */
 #define ARC_AUX_TIMER0_CNT	0x21	/* Timer 0 count */
@@ -57,8 +63,15 @@
 #define ARC_AUX_SLC_INVALIDATE	0x905
 #define ARC_AUX_SLC_IVDL	0x910
 #define ARC_AUX_SLC_FLDL	0x912
+#define ARC_AUX_SLC_RGN_START	0x914
+#define ARC_AUX_SLC_RGN_START1	0x915
+#define ARC_AUX_SLC_RGN_END	0x916
+#define ARC_AUX_SLC_RGN_END1	0x917
 #define ARC_BCR_CLUSTER		0xcf
 
+/* MMU Management regs */
+#define ARC_AUX_MMU_BCR		0x06f
+
 /* IO coherency related auxiliary registers */
 #define ARC_AUX_IO_COH_ENABLE	0x500
 #define ARC_AUX_IO_COH_PARTIAL	0x501
@@ -72,6 +85,19 @@
 /* gcc builtin sr needs reg param to be long immediate */
 #define write_aux_reg(reg_immed, val)		\
 		__builtin_arc_sr((unsigned int)val, reg_immed)
+
+/* ARCNUM [15:8] - field to identify each core in a multi-core system */
+#define CPU_ID_GET()	((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
+
+static const inline int is_isa_arcv2(void)
+{
+	return IS_ENABLED(CONFIG_ISA_ARCV2);
+}
+
+static const inline int is_isa_arcompact(void)
+{
+	return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
+}
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_ARC_ARCREGS_H */

arch/arc/include/asm/bitops.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_BITOPS_H

arch/arc/include/asm/byteorder.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_BYTEORDER_H

arch/arc/include/asm/cache.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_CACHE_H
@@ -30,6 +29,13 @@
 #ifndef __ASSEMBLY__
 
 void cache_init(void);
+void flush_n_invalidate_dcache_all(void);
+void sync_n_cleanup_cache_all(void);
+
+static const inline int is_ioc_enabled(void)
+{
+	return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
+}
 
 #endif /* __ASSEMBLY__ */
 

arch/arc/include/asm/config.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_CONFIG_H_

arch/arc/include/asm/global_data.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef	__ASM_ARC_GLOBAL_DATA_H
 #define __ASM_ARC_GLOBAL_DATA_H
 
+#include <config.h>
+
 #ifndef __ASSEMBLY__
 /* Architecture-specific global data */
 struct arch_global_data {
+	int l1_line_sz;
+#if defined(CONFIG_ISA_ARCV2)
+	int slc_line_sz;
+#endif
 };
 #endif /* __ASSEMBLY__ */
 

arch/arc/include/asm/gpio.h

+#include <asm-generic/gpio.h>

arch/arc/include/asm/io.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_IO_H
@@ -10,7 +9,7 @@
 #include <linux/types.h>
 #include <asm/byteorder.h>
 
-#ifdef CONFIG_ISA_ARCV2
+#ifdef __ARCHS__
 
 /*
  * ARCv2 based HS38 cores are in-order issue, but still weakly ordered
@@ -42,38 +41,14 @@
 #define mb()	asm volatile("sync\n" : : : "memory")
 #endif
 
-#ifdef CONFIG_ISA_ARCV2
+#ifdef __ARCHS__
 #define __iormb()		rmb()
 #define __iowmb()		wmb()
 #else
-#define __iormb()		do { } while (0)
-#define __iowmb()		do { } while (0)
+#define __iormb()		asm volatile("" : : : "memory")
+#define __iowmb()		asm volatile("" : : : "memory")
 #endif
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE	(0)
-#define MAP_WRCOMBINE	(0)
-#define MAP_WRBACK	(0)
-#define MAP_WRTHROUGH	(0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-	return (void *)((unsigned long)paddr);
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
 static inline void sync(void)
 {
 	/* Not yet implemented */
@@ -302,9 +277,6 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-	return (phys_addr_t)((unsigned long)vaddr);
-}
+#include <asm-generic/io.h>
 
 #endif	/* __ASM_ARC_IO_H */

arch/arc/include/asm/linkage.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_LINKAGE_H

arch/arc/include/asm/posix_types.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_POSIX_TYPES_H

arch/arc/include/asm/processor.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _ASM_ARC_PROCESSOR_H

arch/arc/include/asm/ptrace.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_PTRACE_H

arch/arc/include/asm/sections.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_SECTIONS_H

arch/arc/include/asm/string.h

-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
 
-#ifndef __ASM_ARC_STRING_H
-#define __ASM_ARC_STRING_H
-
-#define __HAVE_ARCH_MEMSET
-#define __HAVE_ARCH_MEMCPY
-#define __HAVE_ARCH_MEMCMP
-#define __HAVE_ARCH_STRCHR
-#define __HAVE_ARCH_STRCPY
-#define __HAVE_ARCH_STRCMP
-#define __HAVE_ARCH_STRLEN
-
-extern void *memset(void *ptr, int, __kernel_size_t);
-extern void *memcpy(void *, const void *, __kernel_size_t);
-extern void memzero(void *ptr, __kernel_size_t n);
-extern int memcmp(const void *, const void *, __kernel_size_t);
-extern char *strchr(const char *s, int c);
-extern char *strcpy(char *dest, const char *src);
-extern int strcmp(const char *cs, const char *ct);
-extern __kernel_size_t strlen(const char *);
-
-#endif /* __ASM_ARC_STRING_H */

arch/arc/include/asm/types.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_TYPES_H

arch/arc/include/asm/u-boot-arc.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_U_BOOT_ARC_H__