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  • reform/reform-boundary-uboot
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7 results
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Commits on Source (617)
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with 3706 additions and 50 deletions
image: debian:bullseye-slim
build:
script: |
apt-get update
apt-get --yes install --no-install-recommends gcc-aarch64-linux-gnu build-essential bison flex device-tree-compiler git
cp mntreform-config .config
./build.sh
if git describe >/dev/null 2>&1; then
grep --quiet --fixed-strings "EXTRAVERSION = \\ MNT\\ Reform\\ $(git describe --always --tags --abbrev=0)" Makefile
fi
mv flash.bin imx8mq-mnt-reform2-flash.bin
cp imx8mq-mnt-reform2-flash.bin imx8mq-mnt-reform2-hdmi-flash.bin
artifacts:
paths:
- "imx8mq-mnt-reform2-flash.bin"
- "imx8mq-mnt-reform2-hdmi-flash.bin"
...@@ -104,6 +104,12 @@ config ENV_VARS_UBOOT_CONFIG ...@@ -104,6 +104,12 @@ config ENV_VARS_UBOOT_CONFIG
- CONFIG_SYS_VENDOR - CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC - CONFIG_SYS_SOC
config NR_DRAM_BANKS
int "Number of DRAM banks"
default 4
help
This defines the number of DRAM banks.
config SYS_BOOT_GET_CMDLINE config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup" bool "Enable kernel command line setup"
help help
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
VERSION = 2018 VERSION = 2018
PATCHLEVEL = 07 PATCHLEVEL = 07
SUBLEVEL = SUBLEVEL =
EXTRAVERSION = EXTRAVERSION = \ MNT\ Reform\ 2024-07-19
NAME = NAME =
# *DOCUMENTATION* # *DOCUMENTATION*
...@@ -607,14 +607,18 @@ endif ...@@ -607,14 +607,18 @@ endif
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector) KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks) KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
# change __FILE__ to the relative path from the srctree # change __FILE__ and debugging symbols to the relative path from the
KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=) # srctree
KBUILD_CFLAGS += $(call cc-option,-ffile-prefix-map=$(srctree)/=)
KBUILD_CFLAGS += -g KBUILD_CFLAGS += -g
# $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format> # $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format>
# option to the assembler. # option to the assembler.
KBUILD_AFLAGS += -g KBUILD_AFLAGS += -g
# Use relative paths in debugging symbols
KBUILD_AFLAGS += --debug-prefix-map=$(srctree)/=
# Report stack usage if supported # Report stack usage if supported
# ARC tools based on GCC 7.1 has an issue with stack usage # ARC tools based on GCC 7.1 has an issue with stack usage
# with naked functions, see commit message for more details # with naked functions, see commit message for more details
...@@ -1065,8 +1069,27 @@ U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE)) ...@@ -1065,8 +1069,27 @@ U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
else else
ifneq ($(CONFIG_SPL_FIT_GENERATOR),"") ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
U_BOOT_ITS := u-boot.its U_BOOT_ITS := u-boot.its
$(U_BOOT_ITS): FORCE ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh")
$(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \ U_BOOT_ITS_DEPS += u-boot-nodtb.bin
endif
ifdef CONFIG_IMX8MM
SOC_CPU = iMX8MM
TEE_LOAD_ADDR = 0xbe000000
ATF_LOAD_ADDR = 0x00920000
endif
ifdef CONFIG_IMX8MN
SOC_CPU = iMX8MN
TEE_LOAD_ADDR = 0xbe000000
ATF_LOAD_ADDR = 0x00960000
endif
ifdef CONFIG_IMX8MQ
SOC_CPU = iMX8MQ
TEE_LOAD_ADDR = 0xfe000000
ATF_LOAD_ADDR = 0x00910000
endif
$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
TEE_LOAD_ADDR=$(TEE_LOAD_ADDR) ATF_LOAD_ADDR=$(ATF_LOAD_ADDR) BL31=bl31-${SOC_CPU}.bin $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@ $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
endif endif
endif endif
...@@ -1155,6 +1178,11 @@ tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE ...@@ -1155,6 +1178,11 @@ tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
SPL: spl/u-boot-spl.bin FORCE SPL: spl/u-boot-spl.bin FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
ifeq ($(CONFIG_ARCH_IMX8M), y)
flash.bin: spl/u-boot-spl.bin u-boot.itb FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
endif
u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
......
...@@ -2525,9 +2525,6 @@ FIT uImage format: ...@@ -2525,9 +2525,6 @@ FIT uImage format:
When defined, the linker checks that the actual size does When defined, the linker checks that the actual size does
not exceed it. not exceed it.
CONFIG_SPL_TEXT_BASE
TEXT_BASE for linking the SPL binary.
CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_RELOC_TEXT_BASE
Address to relocate to. If unspecified, this is equal to Address to relocate to. If unspecified, this is equal to
CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
......
...@@ -126,6 +126,7 @@ config X86 ...@@ -126,6 +126,7 @@ config X86
imply CMD_SF_TEST imply CMD_SF_TEST
imply CMD_ZBOOT imply CMD_ZBOOT
imply USB_HOST_ETHER imply USB_HOST_ETHER
imply SPL_SYSRESET
imply USB_ETHER_ASIX imply USB_ETHER_ASIX
imply USB_ETHER_SMSC95XX imply USB_ETHER_SMSC95XX
......
...@@ -1254,6 +1254,7 @@ config ARCH_STM32MP ...@@ -1254,6 +1254,7 @@ config ARCH_STM32MP
select SYSCON select SYSCON
select SYSRESET select SYSRESET
select SYS_THUMB_BUILD select SYS_THUMB_BUILD
imply SPL_SYSRESET
help help
Support for STM32MP SoC family developed by STMicroelectronics, Support for STM32MP SoC family developed by STMicroelectronics,
MPUs based on ARM cortex A core MPUs based on ARM cortex A core
......
...@@ -134,11 +134,11 @@ endif ...@@ -134,11 +134,11 @@ endif
ifdef CONFIG_ARM64 ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \ OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-j .u_boot_list -j .rela.dyn -j .got -j .got.plt \ -j .u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j .binman_sym_table -j .binman_sym_table -j .text_rest
else else
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \ OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \ -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
-j .binman_sym_table -j .binman_sym_table -j .text_rest
endif endif
# if a dtb section exists we always have to include it # if a dtb section exists we always have to include it
......
...@@ -14,8 +14,8 @@ ...@@ -14,8 +14,8 @@
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h> #include <asm/arch/sys_proto.h>
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
#include <fsl_esdhc.h> #include <fsl_esdhc_imx.h>
#endif #endif
#include <netdev.h> #include <netdev.h>
#include <spl.h> #include <spl.h>
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o)) #define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#endif #endif
...@@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis) ...@@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis)
return rc; return rc;
} }
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
/* /*
* Initializes on-chip MMC controllers. * Initializes on-chip MMC controllers.
* to override, implement board_mmc_init() * to override, implement board_mmc_init()
...@@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis) ...@@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) int get_clocks(void)
{ {
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
......
...@@ -16,8 +16,8 @@ ...@@ -16,8 +16,8 @@
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
#include <fsl_esdhc.h> #include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#endif #endif
...@@ -241,7 +241,7 @@ int cpu_eth_init(bd_t *bis) ...@@ -241,7 +241,7 @@ int cpu_eth_init(bd_t *bis)
int get_clocks(void) int get_clocks(void)
{ {
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else #else
...@@ -251,7 +251,7 @@ int get_clocks(void) ...@@ -251,7 +251,7 @@ int get_clocks(void)
return 0; return 0;
} }
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
/* /*
* Initializes on-chip MMC controllers. * Initializes on-chip MMC controllers.
* to override, implement board_mmc_init() * to override, implement board_mmc_init()
......
...@@ -10,11 +10,11 @@ ...@@ -10,11 +10,11 @@
#include <asm/arch/crm_regs.h> #include <asm/arch/crm_regs.h>
#include <asm/mach-imx/sys_proto.h> #include <asm/mach-imx/sys_proto.h>
#include <netdev.h> #include <netdev.h>
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
#include <fsl_esdhc.h> #include <fsl_esdhc_imx.h>
#endif #endif
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#endif #endif
...@@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis) ...@@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis)
return rc; return rc;
} }
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
int cpu_mmc_init(bd_t *bis) int cpu_mmc_init(bd_t *bis)
{ {
return fsl_esdhc_mmc_init(bis); return fsl_esdhc_mmc_init(bis);
...@@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis) ...@@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) int get_clocks(void)
{ {
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#endif #endif
return 0; return 0;
......
...@@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis) ...@@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis)
int get_clocks(void) int get_clocks(void)
{ {
#ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_ESDHC_IMX
gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK); gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK);
#endif #endif
return 0; return 0;
......
...@@ -25,6 +25,19 @@ SECTIONS ...@@ -25,6 +25,19 @@ SECTIONS
{ {
*(.__image_copy_start) *(.__image_copy_start)
CPUDIR/start.o (.text*) CPUDIR/start.o (.text*)
}
/* This needs to come before *(.text*) */
.efi_runtime : {
__efi_runtime_start = .;
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
*(.data.efi_runtime*)
__efi_runtime_stop = .;
}
.text_rest :
{
*(.text*) *(.text*)
} }
...@@ -98,17 +111,10 @@ SECTIONS ...@@ -98,17 +111,10 @@ SECTIONS
. = ALIGN(8); . = ALIGN(8);
.efi_runtime : {
__efi_runtime_start = .;
*(efi_runtime_text)
*(efi_runtime_data)
__efi_runtime_stop = .;
}
.efi_runtime_rel : { .efi_runtime_rel : {
__efi_runtime_rel_start = .; __efi_runtime_rel_start = .;
*(.relaefi_runtime_text) *(.rel*.efi_runtime)
*(.relaefi_runtime_data) *(.rel*.efi_runtime.*)
__efi_runtime_rel_stop = .; __efi_runtime_rel_stop = .;
} }
......
...@@ -43,6 +43,25 @@ SECTIONS ...@@ -43,6 +43,25 @@ SECTIONS
*(.__image_copy_start) *(.__image_copy_start)
*(.vectors) *(.vectors)
CPUDIR/start.o (.text*) CPUDIR/start.o (.text*)
}
/* This needs to come before *(.text*) */
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
*(.data.efi_runtime*)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.text_rest :
{
*(.text*) *(.text*)
} }
...@@ -136,27 +155,14 @@ SECTIONS ...@@ -136,27 +155,14 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(efi_runtime_text)
*(efi_runtime_data)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.efi_runtime_rel_start : .efi_runtime_rel_start :
{ {
*(.__efi_runtime_rel_start) *(.__efi_runtime_rel_start)
} }
.efi_runtime_rel : { .efi_runtime_rel : {
*(.relefi_runtime_text) *(.rel*.efi_runtime)
*(.relefi_runtime_data) *(.rel*.efi_runtime.*)
} }
.efi_runtime_rel_stop : .efi_runtime_rel_stop :
......
...@@ -438,7 +438,9 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \ ...@@ -438,7 +438,9 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8M) += imx8mq-nitrogen8m.dtb dtb-$(CONFIG_ARCH_IMX8M) += imx8mn-ddr4-evk.dtb \
imx8mq-nitrogen8m.dtb \
imx8mq-bio.dtb
dtb-$(CONFIG_RCAR_GEN3) += \ dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-h3ulcb.dtb \ r8a7795-h3ulcb.dtb \
......
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/*
* Copyright 2018 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "imx8mm-nitrogen8mm.dts"
/ {
model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
compatible = "boundary,imx8mm-nitrogen8mm_rev2", "fsl,imx8mm";
};
&wdog1 {
/delete-property/ reset-gpios;
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2019 Boundary Devices
*/
#include "imx8mm-nitrogen8mm.dts"
&iomuxc_pinctrl {
pinctrl_i2c2_sn65dsi83: i2c2-sn65dsi83grp {
fsl,pins = <
#define GPIRQ_I2C2_SN65DSI83 <&gpio1 1 IRQ_TYPE_LEVEL_HIGH>
MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x04
#undef GP_I2C2_SN65DSI83_EN
#define GP_I2C2_SN65DSI83_EN <&gpio5 0 GPIO_ACTIVE_HIGH>
MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x106
>;
};
/delete-node/ i2c3a-rv4162grp;
/delete-node/ i2c3b-csi1grp;
pinctrl_i2c2_rv4162: i2c2-rv4162grp {
fsl,pins = <
#undef GPIRQ_RV4162
#define GPIRQ_RV4162 <&gpio1 3 IRQ_TYPE_LEVEL_LOW>
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0
>;
};
pinctrl_i2c3_csi1: i2c3-csi1grp {
fsl,pins = <
#undef GP_CSI1_MIPI_PWDN
#define GP_CSI1_MIPI_PWDN <&gpio1 11 GPIO_ACTIVE_HIGH>
MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x141
#undef GP_CSI1_MIPI_RESET
#define GP_CSI1_MIPI_RESET <&gpio1 9 GPIO_ACTIVE_LOW>
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x101
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x16
>;
};
pinctrl_usbotg2: usbotg2grp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR 0x16
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x16
>;
};
};
/ {
model = "Boundary Devices i.MX8MMini Nitrogen8MM Som";
compatible = "boundary,imx8mm-nitrogen8mm_som", "fsl,imx8mm";
};
&i2c2 {
rtc@68 {
compatible = "microcrystal,rv4162";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_rv4162>;
reg = <0x68>;
interrupts-extended = GPIRQ_RV4162;
wakeup-source;
};
};
&i2c3 {
/delete-node/ i2cmux@70;
};
&usbotg2 {
disable-over-current;
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
*/
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&pinctrl_reg_usdhc2_vmmc {
u-boot,dm-spl;
};
&pinctrl_uart2 {
u-boot,dm-spl;
};
&pinctrl_usdhc2_gpio {
u-boot,dm-spl;
};
&pinctrl_usdhc2 {
u-boot,dm-spl;
};
&pinctrl_usdhc3 {
u-boot,dm-spl;
};
&gpio1 {
u-boot,dm-spl;
};
&gpio2 {
u-boot,dm-spl;
};
&gpio3 {
u-boot,dm-spl;
};
&gpio4 {
u-boot,dm-spl;
};
&gpio5 {
u-boot,dm-spl;
};
&uart2 {
u-boot,dm-spl;
};
&usdhc1 {
u-boot,dm-spl;
};
&usdhc2 {
u-boot,dm-spl;
};
&usdhc3 {
u-boot,dm-spl;
};