api/api_private.h

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _API_PRIVATE_H_

api/api_storage.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007-2008 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>

arch/Kconfig

@@ -26,6 +26,8 @@ config ARM
 config M68K
 	bool "M68000 architecture"
 	select HAVE_PRIVATE_LIBGCC
+	select SYS_BOOT_GET_CMDLINE
+	select SYS_BOOT_GET_KBD
 
 config MICROBLAZE
 	bool "MicroBlaze architecture"
@@ -53,6 +55,12 @@ config PPC
 	bool "PowerPC architecture"
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
+	select SYS_BOOT_GET_CMDLINE
+	select SYS_BOOT_GET_KBD
+
+config RISCV
+	bool "riscv architecture"
+	select SUPPORT_OF_CONTROL
 
 config SANDBOX
 	bool "Sandbox"
@@ -66,6 +74,9 @@ config SANDBOX
 	select DM_SPI
 	select DM_GPIO
 	select DM_MMC
+	select HAVE_BLOCK_DEVICE
+	select SPI
+	select LZO
 	imply CMD_GETTIME
 	imply CMD_HASH
 	imply CMD_IO
@@ -77,6 +88,7 @@ config SANDBOX
 	imply LZMA
 	imply SCSI
 	imply CMD_SATA
+	imply CMD_SF_TEST
 
 config SH
 	bool "SuperH architecture"
@@ -86,18 +98,37 @@ config X86
 	bool "x86 architecture"
 	select CREATE_ARCH_SYMLINK
 	select HAVE_PRIVATE_LIBGCC
+	select USE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
+	select OF_CONTROL
 	select DM
-	select DM_KEYBOARD
-	select DM_SERIAL
-	select DM_GPIO
-	select DM_SPI
-	select DM_SPI_FLASH
-	select USB_EHCI_HCD
+	select DM_PCI
+	select PCI
+	select TIMER
+	select X86_TSC_TIMER
+	imply BLK
+	imply DM_ETH
+	imply DM_GPIO
+	imply DM_KEYBOARD
+	imply DM_MMC
+	imply DM_RTC
+	imply DM_SERIAL
+	imply DM_SCSI
+	imply DM_SPI
+	imply DM_SPI_FLASH
+	imply DM_USB
+	imply DM_VIDEO
 	imply CMD_FPGA_LOADMK
 	imply CMD_GETTIME
 	imply CMD_IO
 	imply CMD_IRQ
+	imply CMD_PCI
+	imply CMD_SF_TEST
+	imply CMD_ZBOOT
+	imply USB_HOST_ETHER
+	imply SPL_SYSRESET
+	imply USB_ETHER_ASIX
+	imply USB_ETHER_SMSC95XX
 
 config XTENSA
 	bool "Xtensa architecture"
@@ -174,3 +205,4 @@ source "arch/sandbox/Kconfig"
 source "arch/sh/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
+source "arch/riscv/Kconfig"

arch/arc/Kconfig

@@ -116,6 +116,24 @@ config SYS_DCACHE_OFF
 	bool "Do not use Data Cache"
 	default n
 
+menuconfig ARC_DBG
+	bool "ARC debugging"
+	default n
+
+if ARC_DBG
+
+config ARC_DBG_IOC_ENABLE
+	bool "Enable IO coherency unit"
+	depends on CPU_ARCHS38
+	default n
+	help
+	  Enable IO coherency unit to debug problems with caches and
+	  DMA peripherals.
+	  NOTE: as of today linux will not work properly if this option
+	  is enabled in u-boot!
+
+endif
+
 choice
 	prompt "Target select"
 	default TARGET_AXS103
@@ -132,6 +150,10 @@ config TARGET_AXS101
 config TARGET_AXS103
 	bool "Support Synopsys Designware SDP board AXS103"
 
+config TARGET_EMDK
+	bool "Synopsys EM Development kit"
+	select CPU_ARCEM6
+
 config TARGET_HSDK
 	bool "Support Synpsys HS DevelopmentKit board"
 
@@ -140,6 +162,7 @@ endchoice
 source "board/abilis/tb100/Kconfig"
 source "board/synopsys/Kconfig"
 source "board/synopsys/axs10x/Kconfig"
+source "board/synopsys/emdk/Kconfig"
 source "board/synopsys/hsdk/Kconfig"
 
 endmenu

arch/arc/Makefile

-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 libs-y += arch/arc/cpu/$(CPU)/
 libs-y += arch/arc/lib/

arch/arc/config.mk

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 ifndef CONFIG_CPU_BIG_ENDIAN
 CONFIG_SYS_LITTLE_ENDIAN = 1
@@ -50,10 +48,11 @@ ifdef CONFIG_CPU_ARCHS38
 PLATFORM_CPPFLAGS += -mcpu=archs
 endif
 
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
+PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
 
 # Needed for relocation
-LDFLAGS_FINAL += -pie
+LDFLAGS_FINAL += -pie --gc-sections
 
 # Load address for standalone apps
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

arch/arc/cpu/arcv1/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += ivt.o

arch/arc/cpu/arcv1/ivt.S

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "ax",@progbits

arch/arc/cpu/arcv2/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += ivt.o

arch/arc/cpu/arcv2/ivt.S

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "a",@progbits

arch/arc/cpu/u-boot.lds

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 
-OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
 OUTPUT_ARCH(arc)
 ENTRY(_start)
 SECTIONS
 {
 	. = CONFIG_SYS_TEXT_BASE;
 	__image_copy_start = .;
-	__text_start = .;
-	.text :	{
-		arch/arc/lib/start.o (.text*)
-		*(.text*)
-	}
-	__text_end = .;
-
 	. = ALIGN(1024);
 	__ivt_start = .;
 	.ivt :
 	{
-		*(.ivt)
+		KEEP(*(.ivt))
 	}
 	__ivt_end = .;
 
+	. = ALIGN(1024);
+	__text_start = .;
+	.text :	{
+		arch/arc/lib/start.o (.text*)
+		*(.text*)
+	}
+	__text_end = .;
+
 	. = ALIGN(4);
 	.rodata : {
 		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

arch/arc/dts/.gitignore

-*.dtb

arch/arc/dts/Makefile

-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 dtb-$(CONFIG_TARGET_AXS101) +=  axs101.dtb
 dtb-$(CONFIG_TARGET_AXS103) +=  axs103.dtb
 dtb-$(CONFIG_TARGET_NSIM) +=  nsim.dtb
 dtb-$(CONFIG_TARGET_TB100) +=  abilis_tb100.dtb
+dtb-$(CONFIG_TARGET_EMDK) +=  emdk.dtb
 dtb-$(CONFIG_TARGET_HSDK) +=  hsdk.dtb
 
 targets += $(dtb-y)

arch/arc/dts/abilis_tb100.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axc001.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /include/ "skeleton.dtsi"

arch/arc/dts/axc003.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /include/ "skeleton.dtsi"

arch/arc/dts/axs101.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axs103.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axs10x_mb.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 / {
@@ -31,11 +30,8 @@
 		};
 
 		ethernet@18000 {
-			#interrupt-cells = <1>;
 			compatible = "altr,socfpga-stmmac";
 			reg = < 0x18000 0x2000 >;
-			interrupts = < 25 >;
-			interrupt-names = "macirq";
 			phy-mode = "gmii";
 			snps,pbl = < 32 >;
 			clocks = <&apbclk>;
@@ -46,13 +42,11 @@
 		ehci@0x40000 {
 			compatible = "generic-ehci";
 			reg = < 0x40000 0x100 >;
-			interrupts = < 8 >;
 		};
 
 		ohci@0x60000 {
 			compatible = "generic-ohci";
 			reg = < 0x60000 0x100 >;
-			interrupts = < 8 >;
 		};
 
 		uart0: serial0@22000 {

arch/arc/dts/emdk.dts

+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		console = &uart0;
+	};
+
+	cpu_card {
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <40000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	uart0: serial0@f0004000 {
+		compatible = "snps,dw-apb-uart";
+		clock-frequency = <100000000>;
+		reg = <0xf0004000 0x1000>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+};