api/api_storage.c

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007-2008 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>

arch/Kconfig

@@ -26,6 +26,8 @@ config ARM
 config M68K
 	bool "M68000 architecture"
 	select HAVE_PRIVATE_LIBGCC
+	select SYS_BOOT_GET_CMDLINE
+	select SYS_BOOT_GET_KBD
 
 config MICROBLAZE
 	bool "MicroBlaze architecture"
@@ -53,6 +55,12 @@ config PPC
 	bool "PowerPC architecture"
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
+	select SYS_BOOT_GET_CMDLINE
+	select SYS_BOOT_GET_KBD
+
+config RISCV
+	bool "riscv architecture"
+	select SUPPORT_OF_CONTROL
 
 config SANDBOX
 	bool "Sandbox"
@@ -66,6 +74,8 @@ config SANDBOX
 	select DM_SPI
 	select DM_GPIO
 	select DM_MMC
+	select HAVE_BLOCK_DEVICE
+	select SPI
 	select LZO
 	imply CMD_GETTIME
 	imply CMD_HASH
@@ -116,6 +126,7 @@ config X86
 	imply CMD_SF_TEST
 	imply CMD_ZBOOT
 	imply USB_HOST_ETHER
+	imply SPL_SYSRESET
 	imply USB_ETHER_ASIX
 	imply USB_ETHER_SMSC95XX
 
@@ -194,3 +205,4 @@ source "arch/sandbox/Kconfig"
 source "arch/sh/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
+source "arch/riscv/Kconfig"

arch/arc/Kconfig

@@ -116,6 +116,24 @@ config SYS_DCACHE_OFF
 	bool "Do not use Data Cache"
 	default n
 
+menuconfig ARC_DBG
+	bool "ARC debugging"
+	default n
+
+if ARC_DBG
+
+config ARC_DBG_IOC_ENABLE
+	bool "Enable IO coherency unit"
+	depends on CPU_ARCHS38
+	default n
+	help
+	  Enable IO coherency unit to debug problems with caches and
+	  DMA peripherals.
+	  NOTE: as of today linux will not work properly if this option
+	  is enabled in u-boot!
+
+endif
+
 choice
 	prompt "Target select"
 	default TARGET_AXS103
@@ -132,6 +150,10 @@ config TARGET_AXS101
 config TARGET_AXS103
 	bool "Support Synopsys Designware SDP board AXS103"
 
+config TARGET_EMDK
+	bool "Synopsys EM Development kit"
+	select CPU_ARCEM6
+
 config TARGET_HSDK
 	bool "Support Synpsys HS DevelopmentKit board"
 
@@ -140,6 +162,7 @@ endchoice
 source "board/abilis/tb100/Kconfig"
 source "board/synopsys/Kconfig"
 source "board/synopsys/axs10x/Kconfig"
+source "board/synopsys/emdk/Kconfig"
 source "board/synopsys/hsdk/Kconfig"
 
 endmenu

arch/arc/Makefile

-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 libs-y += arch/arc/cpu/$(CPU)/
 libs-y += arch/arc/lib/

arch/arc/config.mk

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 ifndef CONFIG_CPU_BIG_ENDIAN
 CONFIG_SYS_LITTLE_ENDIAN = 1
@@ -50,10 +48,11 @@ ifdef CONFIG_CPU_ARCHS38
 PLATFORM_CPPFLAGS += -mcpu=archs
 endif
 
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
+PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
 
 # Needed for relocation
-LDFLAGS_FINAL += -pie
+LDFLAGS_FINAL += -pie --gc-sections
 
 # Load address for standalone apps
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

arch/arc/cpu/arcv1/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += ivt.o

arch/arc/cpu/arcv1/ivt.S

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "ax",@progbits

arch/arc/cpu/arcv2/Makefile

+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
 
 obj-y += ivt.o

arch/arc/cpu/arcv2/ivt.S

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "a",@progbits

arch/arc/cpu/u-boot.lds

+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 
-OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
 OUTPUT_ARCH(arc)
 ENTRY(_start)
 SECTIONS
 {
 	. = CONFIG_SYS_TEXT_BASE;
 	__image_copy_start = .;
-	__text_start = .;
-	.text :	{
-		arch/arc/lib/start.o (.text*)
-		*(.text*)
-	}
-	__text_end = .;
-
 	. = ALIGN(1024);
 	__ivt_start = .;
 	.ivt :
 	{
-		*(.ivt)
+		KEEP(*(.ivt))
 	}
 	__ivt_end = .;
 
+	. = ALIGN(1024);
+	__text_start = .;
+	.text :	{
+		arch/arc/lib/start.o (.text*)
+		*(.text*)
+	}
+	__text_end = .;
+
 	. = ALIGN(4);
 	.rodata : {
 		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

arch/arc/dts/.gitignore

-*.dtb

arch/arc/dts/Makefile

-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 dtb-$(CONFIG_TARGET_AXS101) +=  axs101.dtb
 dtb-$(CONFIG_TARGET_AXS103) +=  axs103.dtb
 dtb-$(CONFIG_TARGET_NSIM) +=  nsim.dtb
 dtb-$(CONFIG_TARGET_TB100) +=  abilis_tb100.dtb
+dtb-$(CONFIG_TARGET_EMDK) +=  emdk.dtb
 dtb-$(CONFIG_TARGET_HSDK) +=  hsdk.dtb
 
 targets += $(dtb-y)

arch/arc/dts/abilis_tb100.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axc001.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /include/ "skeleton.dtsi"

arch/arc/dts/axc003.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /include/ "skeleton.dtsi"

arch/arc/dts/axs101.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axs103.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 

arch/arc/dts/axs10x_mb.dtsi

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 / {
@@ -31,11 +30,8 @@
 		};
 
 		ethernet@18000 {
-			#interrupt-cells = <1>;
 			compatible = "altr,socfpga-stmmac";
 			reg = < 0x18000 0x2000 >;
-			interrupts = < 25 >;
-			interrupt-names = "macirq";
 			phy-mode = "gmii";
 			snps,pbl = < 32 >;
 			clocks = <&apbclk>;
@@ -46,13 +42,11 @@
 		ehci@0x40000 {
 			compatible = "generic-ehci";
 			reg = < 0x40000 0x100 >;
-			interrupts = < 8 >;
 		};
 
 		ohci@0x60000 {
 			compatible = "generic-ohci";
 			reg = < 0x60000 0x100 >;
-			interrupts = < 8 >;
 		};
 
 		uart0: serial0@22000 {

arch/arc/dts/emdk.dts

+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		console = &uart0;
+	};
+
+	cpu_card {
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <40000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	uart0: serial0@f0004000 {
+		compatible = "snps,dw-apb-uart";
+		clock-frequency = <100000000>;
+		reg = <0xf0004000 0x1000>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+};

arch/arc/dts/hsdk.dts

+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include "dt-bindings/clock/snps,hsdk-cgu.h"
 
 / {
 	#address-cells = <1>;
@@ -13,6 +13,7 @@
 
 	aliases {
 		console = &uart0;
+		spi0 = &spi0;
 	};
 
 	cpu_card {
@@ -24,6 +25,41 @@
 		};
 	};
 
+	clk-fmeas {
+		clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
+			 <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
+			 <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
+			 <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
+			 <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
+			 <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
+			 <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
+			 <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
+			 <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
+			 <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
+			 <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
+			 <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
+			 <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
+		clock-names = "cpu-pll", "sys-pll",
+			      "tun-pll", "ddr-clk",
+			      "cpu-clk", "hdmi-pll",
+			      "tun-clk", "hdmi-clk",
+			      "apb-clk", "axi-clk",
+			      "eth-clk", "usb-clk",
+			      "sdio-clk", "hdmi-sys-clk",
+			      "gfx-core-clk", "gfx-dma-clk",
+			      "gfx-cfg-clk", "dmac-core-clk",
+			      "dmac-cfg-clk", "sdio-ref-clk",
+			      "spi-clk", "i2c-clk",
+			      "uart-clk", "ebi-clk",
+			      "rom-clk", "pwm-clk";
+	};
+
+	cgu_clk: cgu-clk@f0000000 {
+		compatible = "snps,hsdk-cgu-clock";
+		reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
+		#clock-cells = <1>;
+	};
+
 	uart0: serial0@f0005000 {
 		compatible = "snps,dw-apb-uart";
 		reg = <0xf0005000 0x1000>;
@@ -47,4 +83,29 @@
 		compatible = "generic-ohci";
 		reg = <0xf0060000 0x100>;
 	};
+
+	spi0: spi@f0020000 {
+		compatible = "snps,dw-apb-ssi";
+		reg = <0xf0020000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		spi-max-frequency = <4000000>;
+		clocks = <&cgu_clk CLK_SYS_SPI_REF>;
+		clock-names = "spi_clk";
+		cs-gpio = <&cs_gpio 0>;
+		spi_flash@0 {
+			compatible = "spi-flash";
+			reg = <0>;
+			spi-max-frequency = <4000000>;
+		};
+	};
+
+	cs_gpio: gpio@f00014b0 {
+		compatible = "snps,hsdk-creg-gpio";
+		reg = <0xf00014b0 0x4>;
+		gpio-controller;
+		#gpio-cells = <1>;
+		gpio-bank-name = "hsdk-spi-cs";
+		gpio-count = <1>;
+	};
 };