From e1ddc4d7d953338cc417d94ddca9e4f9b0dfc8a8 Mon Sep 17 00:00:00 2001
From: Troy Kisky <troy.kisky@boundarydevices.com>
Date: Wed, 8 Aug 2018 15:56:49 -0700
Subject: [PATCH] nitrogen8m: initialize DWC3_GCTL_PWRDNSCALE for usb gadget

This lets the USB gadget connect faster. Before the ether gadget
was timing out.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
 board/boundary/nitrogen8m/nitrogen8m.c | 36 ++++++++++++++++----------
 1 file changed, 22 insertions(+), 14 deletions(-)

diff --git a/board/boundary/nitrogen8m/nitrogen8m.c b/board/boundary/nitrogen8m/nitrogen8m.c
index 072f58e84f3..51e455b8bb5 100644
--- a/board/boundary/nitrogen8m/nitrogen8m.c
+++ b/board/boundary/nitrogen8m/nitrogen8m.c
@@ -30,6 +30,7 @@
 #include <dm.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
+#include <linux/usb/dwc3.h>
 #include "../common/padctrl.h"
 #include "../common/bd_common.h"
 
@@ -177,25 +178,32 @@ int usb_gadget_handle_interrupts(void)
 
 static void dwc3_nxp_usb_phy_init(struct dwc3_device *dwc3)
 {
-	u32 RegData;
+	struct dwc3 *dwc3_reg = (struct dwc3 *)(dwc3->base + DWC3_REG_OFFSET);
+	u32 val;
 
-	RegData = readl(dwc3->base + USB_PHY_CTRL1);
-	RegData &= ~(USB_PHY_CTRL1_VDATSRCENB0 | USB_PHY_CTRL1_VDATDETENB0 |
+	val = readl(dwc3->base + USB_PHY_CTRL1);
+	val &= ~(USB_PHY_CTRL1_VDATSRCENB0 | USB_PHY_CTRL1_VDATDETENB0 |
 			USB_PHY_CTRL1_COMMONONN);
-	RegData |= USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET;
-	writel(RegData, dwc3->base + USB_PHY_CTRL1);
+	val |= USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET;
+	writel(val, dwc3->base + USB_PHY_CTRL1);
 
-	RegData = readl(dwc3->base + USB_PHY_CTRL0);
-	RegData |= USB_PHY_CTRL0_REF_SSP_EN;
-	writel(RegData, dwc3->base + USB_PHY_CTRL0);
+	val = readl(dwc3->base + USB_PHY_CTRL0);
+	val |= USB_PHY_CTRL0_REF_SSP_EN;
+	writel(val, dwc3->base + USB_PHY_CTRL0);
 
-	RegData = readl(dwc3->base + USB_PHY_CTRL2);
-	RegData |= USB_PHY_CTRL2_TXENABLEN0;
-	writel(RegData, dwc3->base + USB_PHY_CTRL2);
+	val = readl(dwc3->base + USB_PHY_CTRL2);
+	val |= USB_PHY_CTRL2_TXENABLEN0;
+	writel(val, dwc3->base + USB_PHY_CTRL2);
 
-	RegData = readl(dwc3->base + USB_PHY_CTRL1);
-	RegData &= ~(USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET);
-	writel(RegData, dwc3->base + USB_PHY_CTRL1);
+	val = readl(dwc3->base + USB_PHY_CTRL1);
+	val &= ~(USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET);
+	writel(val, dwc3->base + USB_PHY_CTRL1);
+
+	val = readl(&dwc3_reg->g_ctl);
+	val &= ~(DWC3_GCTL_PWRDNSCALE_MASK);
+	val |= DWC3_GCTL_PWRDNSCALE(2);
+
+	writel(val, &dwc3_reg->g_ctl);
 }
 #endif
 
-- 
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