From aad4659a2fde4b69e8124d6fe8b57bf28d3c747d Mon Sep 17 00:00:00 2001
From: Abbas Raza <Abbas_Raza@mentor.com>
Date: Mon, 25 Mar 2013 09:13:34 +0000
Subject: [PATCH] mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by
a board
Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.
It is tested with a MMCplus card.
Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
---
board/boundary/nitrogen6x/nitrogen6x.c | 3 +++
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 3 +++
board/wandboard/wandboard.c | 2 ++
drivers/mmc/fsl_esdhc.c | 7 +++++++
include/fsl_esdhc.h | 1 +
5 files changed, 16 insertions(+)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 229c2378396..e5b7795c5b1 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -304,6 +304,9 @@ int board_mmc_init(bd_t *bis)
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ usdhc_cfg[1].max_bus_width = 4;
+
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 5b69a6d2dec..0e25613f19f 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -274,6 +274,9 @@ int board_mmc_init(bd_t *bis)
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ usdhc_cfg[1].max_bus_width = 4;
+
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index d95189f77de..8d071e1fe12 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -105,6 +105,8 @@ int board_mmc_init(bd_t *bis)
imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
}
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 54b5363169b..35f879ea6e5 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -580,6 +580,13 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
+ if (cfg->max_bus_width > 0) {
+ if (cfg->max_bus_width < 8)
+ mmc->host_caps &= ~MMC_MODE_8BIT;
+ if (cfg->max_bus_width < 4)
+ mmc->host_caps &= ~MMC_MODE_4BIT;
+ }
+
if (caps & ESDHC_HOSTCAPBLT_HSS)
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 47d2fe4f188..0a1a0715e95 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -168,6 +168,7 @@
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 sdhc_clk;
+ u8 max_bus_width;
};
/* Select the correct accessors depending on endianess */
--
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