diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index ed6bbb46eaa4ab33313cdcccf6af0e7bd02d60bf..04a7470c4237f04152b5ba64cd08bffb6df10982 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -140,7 +140,7 @@ phys_size_t initdram (int board_type) uint *p = 0; uint i = 0; volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); - dma_init(); + for (*p = 0; p < (uint *)(8 * 1024); p++) { if (((unsigned int)p & 0x1f) == 0) { dcbz(p); } *p = (unsigned int)0xdeadbeef; diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index f8527f9cccc9255ae94b63ad497893e4e9c0709e..17f900bd1af01048bf596ea6097e72135b313731 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -341,7 +341,7 @@ phys_size_t initdram (int board_type) uint *p = 0; uint i = 0; volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); - dma_init(); + for (*p = 0; p < (uint *)(8 * 1024); p++) { if (((unsigned int)p & 0x1f) == 0) { dcbz(p); } *p = (unsigned int)0xdeadbeef; diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index c98dd8da58fb829b983b7354bab108b608f60c31..41de6942a62cf6448af6dd977639c72ef8aaaa03 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -261,7 +261,9 @@ void cpu_init_f (void) #if defined(CONFIG_MPC8536) fsl_serdes_init(); #endif - +#if defined(CONFIG_FSL_DMA) + dma_init(); +#endif } diff --git a/cpu/mpc85xx/ddr-gen1.c b/cpu/mpc85xx/ddr-gen1.c index 9fc498ed448eb7f6d68967261ea9e5bd0726c64b..3bf872b6fbbf8ab2ebd63068b780d7df142547ac 100644 --- a/cpu/mpc85xx/ddr-gen1.c +++ b/cpu/mpc85xx/ddr-gen1.c @@ -77,8 +77,6 @@ ddr_enable_ecc(unsigned int dram_size) uint i = 0; volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); - dma_init(); - for (*p = 0; p < (uint *)(8 * 1024); p++) { if (((unsigned int)p & 0x1f) == 0) { ppcDcbz((unsigned long) p); diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index 49528aae713a1f7bb3b20f7603af62ed7efce1bc..341e815961c5917dec3e65806f64176d44a3d991 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -113,6 +113,9 @@ void cpu_init_f(void) memctl->or7 = CONFIG_SYS_OR7_PRELIM; memctl->br7 = CONFIG_SYS_BR7_PRELIM; #endif +#if defined(CONFIG_FSL_DMA) + dma_init(); +#endif /* enable the timebase bit in HID0 */ set_hid0(get_hid0() | 0x4000000);