diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d260e5d62fb47d8c5d403c9091905bd2d19e5a21..1e6d90c68f3806ded89aa6532e9150077e443fcf 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -874,7 +874,7 @@ void update_early_mmu_table(void) __weak int dram_init(void) { - gd->ram_size = initdram(); + initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/arch/mips/mach-ath79/dram.c b/arch/mips/mach-ath79/dram.c index 5ef43a059d18483c175fec7538760a88c663f5ad..1c73addcb3843f0f152905d4cd2c1f5593e29e52 100644 --- a/arch/mips/mach-ath79/dram.c +++ b/arch/mips/mach-ath79/dram.c @@ -9,8 +9,12 @@ #include <asm/addrspace.h> #include <mach/ddr.h> -phys_size_t initdram(void) +DECLARE_GLOBAL_DATA_PTR; + +int initdram(void) { ddr_tap_tuning(); - return get_ram_size((void *)KSEG1, SZ_256M); + gd->ram_size = get_ram_size((void *)KSEG1, SZ_256M); + + return 0; } diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c index f15b58d849128061e15fdd8cc95de744807017a3..c96e0468485002c44b7663f4829eca4dcfa3ceda 100644 --- a/arch/mips/mach-pic32/cpu.c +++ b/arch/mips/mach-pic32/cpu.c @@ -110,12 +110,14 @@ static void ddr2_pmd_ungate(void) } /* initialize the DDR2 Controller and DDR2 PHY */ -phys_size_t initdram(void) +int initdram(void) { ddr2_pmd_ungate(); ddr2_phy_init(); ddr2_ctrl_init(); - return ddr2_calculate_size(); + gd->ram_size = ddr2_calculate_size(); + + return 0; } int misc_init_r(void) diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 192634d41cd7ceef98700d05025f58d989ee5bcd..64e0aa751811497fc73f858e33eb6a13683614ad 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -401,17 +401,19 @@ void mpc85xx_reginfo(void) #ifndef CONFIG_FSL_CORENET #if (defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)) && \ !defined(CONFIG_SYS_INIT_L2_ADDR) -phys_size_t initdram(void) +int initdram(void) { #if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) || \ defined(CONFIG_ARCH_QEMU_E500) - return fsl_ddr_sdram_size(); + gd->ram_size = fsl_ddr_sdram_size(); #else - return (phys_size_t)CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = (phys_size_t)CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; #endif + + return 0; } #else /* CONFIG_SYS_RAMBOOT */ -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = 0; @@ -460,7 +462,9 @@ phys_size_t initdram(void) #endif debug("DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } #endif /* CONFIG_SYS_RAMBOOT */ #endif diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index 3b79efb24648420b8645f0fec9f4db2c65f6c6a8..87fd5e65e0210cdbce4b5f5e4cf46629b8b5bf91 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -33,6 +33,8 @@ #include "ecc.h" +DECLARE_GLOBAL_DATA_PTR; + #define PPC4xx_IBM_DDR2_DUMP_REGISTER(mnemonic) \ do { \ u32 data; \ @@ -414,7 +416,7 @@ static unsigned char spd_read(uchar chip, uint addr) * banks appropriately. If Auto Memory Configuration is * not used, it is assumed that no DIMM is plugged *-----------------------------------------------------------------------------*/ -phys_size_t initdram(void) +int initdram(void) { unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS; unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE}; @@ -429,7 +431,9 @@ phys_size_t initdram(void) * Reduce RAM size to avoid overwriting memory used by * current stack? Not sure what is happening. */ - return sdram_memsize() / 2; + gd->ram_size = sdram_memsize() / 2; + + return 0; } num_dimm_banks = sizeof(iic0_dimm_addr); @@ -650,7 +654,9 @@ phys_size_t initdram(void) */ set_mcsr(get_mcsr()); - return sdram_memsize(); + gd->ram_size = sdram_memsize(); + + return 0; } static void get_spd_info(unsigned long *dimm_populated, @@ -2855,7 +2861,7 @@ static void test(void) * time parameters. * Configures the PPC405EX(r) and PPC460EX/GT *---------------------------------------------------------------------------*/ -phys_size_t initdram(void) +int initdram(void) { unsigned long val; @@ -3011,7 +3017,9 @@ phys_size_t initdram(void) set_mcsr(get_mcsr()); #endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } #endif /* CONFIG_SPD_EEPROM */ diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c index 3b072b7791f66bd3141db6357d466c25fc0fc379..14d0fd915434b47a84dd175e567f17ad6a9d12af 100644 --- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c @@ -30,6 +30,8 @@ #include <asm/mmu.h> #include <asm/cache.h> +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_SPD_EEPROM) && \ (defined(CONFIG_440EPX) || defined(CONFIG_440GRX)) @@ -998,7 +1000,7 @@ static void program_ddr0_44(unsigned long dimm_ranks[], * banks appropriately. If Auto Memory Configuration is * not used, it is assumed that no DIMM is plugged *-----------------------------------------------------------------------------*/ -phys_size_t initdram(void) +int initdram(void) { unsigned char const iic0_dimm_addr[] = SPD_EEPROM_ADDRESS; unsigned long dimm_ranks[MAXDIMMS]; @@ -1212,7 +1214,9 @@ phys_size_t initdram(void) #endif /* defined(CONFIG_ZERO_SDRAM) || defined(CONFIG_DDR_ECC) */ program_tlb(0, CONFIG_SYS_SDRAM_BASE, dram_size, MY_TLB_WORD2_I_ENABLE); - return dram_size; + gd->ram_size = dram_size; + + return 0; } void board_add_ram_info(int use_default) diff --git a/arch/powerpc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c index 2d805717a7f8fe3238bca32fd3180d7c195438cd..a49bd69aba1d7af5149e266427778581288911a6 100644 --- a/arch/powerpc/cpu/ppc4xx/sdram.c +++ b/arch/powerpc/cpu/ppc4xx/sdram.c @@ -17,6 +17,8 @@ #include "sdram.h" #include "ecc.h" +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SDRAM_BANK0 #ifndef CONFIG_440 @@ -148,7 +150,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh) /* * Autodetect onboard SDRAM on 405 platforms */ -phys_size_t initdram(void) +int initdram(void) { ulong speed; ulong sdtr1; @@ -226,11 +228,13 @@ phys_size_t initdram(void) /* * OK, size detected -> all done */ - return size; + gd->ram_size = size; + + return 0; } } - return 0; + return -ENXIO; } #else /* CONFIG_440 */ @@ -349,7 +353,7 @@ static void sdram_tr1_set(int ram_address, int* tr1_value) * so this should be extended for other future boards * using this routine! */ -phys_size_t initdram(void) +int initdram(void) { int i; int tr1_bank1; @@ -440,11 +444,13 @@ phys_size_t initdram(void) /* * OK, size detected -> all done */ - return size; + gd->ram_size = size; + + return 0; } } - return 0; /* nothing found ! */ + return -ENXIO; /* nothing found ! */ } #endif /* CONFIG_440 */ diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c index 8a7fa1d97c96d7e1b9ff6895d4d7f067f1ea91b2..45e78c63a3c74432c570d5e9c1e69f92d4b4c627 100644 --- a/board/Arcturus/ucp1020/spl.c +++ b/board/Arcturus/ucp1020/spl.c @@ -110,7 +110,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c index 292752450d4bc348692383b6cdd0ba4ef899be8e..3024a9c681e3e350bf367c95f9495f663adaa7b3 100644 --- a/board/BuS/eb_cpu5282/eb_cpu5282.c +++ b/board/BuS/eb_cpu5282/eb_cpu5282.c @@ -35,7 +35,7 @@ int checkboard (void) return 0; } -phys_size_t initdram(void) +int initdram(void) { int size, i; @@ -92,7 +92,9 @@ phys_size_t initdram(void) *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5; size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024; #endif - return size; + gd->ram_size = size; + + return 0; } #if defined(CONFIG_SYS_DRAM_TEST) diff --git a/board/a3m071/a3m071.c b/board/a3m071/a3m071.c index b11ff980b8db816a213a6a8951cc60e75bb2ceee..c1120c400442039bf6bf3eed57ca7102b44ab4b9 100644 --- a/board/a3m071/a3m071.c +++ b/board/a3m071/a3m071.c @@ -76,7 +76,7 @@ static void sdram_start(int hi_addr) * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -153,7 +153,9 @@ phys_size_t initdram(void) if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32((void *)MPC5XXX_SDRAM_SDELAY, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } static void get_revisions(int *failsavelevel, int *digiboardversion, diff --git a/board/a4m072/a4m072.c b/board/a4m072/a4m072.c index 88d4942ce74e6778b8b119e68e96b5f06eb3bac9..d4b30fd1478bde69601166b6aa886ec7b1e2c82e 100644 --- a/board/a4m072/a4m072.c +++ b/board/a4m072/a4m072.c @@ -23,6 +23,8 @@ #include "mt46v32m16.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -71,7 +73,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; uint svr, pvr; @@ -150,7 +152,9 @@ phys_size_t initdram(void) __asm__ volatile ("sync"); } - return dramsize; + gd->ram_size = dramsize; + + return 0; } int checkboard (void) diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 841bcfa4bfd245b5cdac8e5ce7a6f0e33452651d..cd78a147b1358faae4b807cbbfbc43929f956434 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -15,6 +15,8 @@ #include <asm/io.h> #include <asm/ppc4xx-gpio.h> +DECLARE_GLOBAL_DATA_PTR; + extern void board_pll_init_f(void); static void cram_bcr_write(u32 wr_val) @@ -41,7 +43,7 @@ static void cram_bcr_write(u32 wr_val) return; } -phys_size_t initdram(void) +int initdram(void) { int i; u32 val; @@ -77,5 +79,7 @@ phys_size_t initdram(void) for (i=0; i<200000; i++) ; - return (CONFIG_SYS_MBYTES_RAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_RAM << 20; + + return 0; } diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index ae69f5a1b1a0e2b75742e0b083fe31f6fa95b404..453677aa66e0fa44cc22f223dfed75c3d5a7d826 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -12,6 +12,8 @@ #include <asm/ppc440.h> #include "bamboo.h" +DECLARE_GLOBAL_DATA_PTR; + void ext_bus_cntlr_init(void); void configure_ppc440ep_pins(void); int is_nand_selected(void); @@ -436,9 +438,11 @@ int checkboard(void) } -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } /*----------------------------------------------------------------------------+ diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c index e3567173c2aff865c8f92c9467298ae02d89f49d..725b9ca08668617588856cdc3e5425972078dc0b 100644 --- a/board/amcc/bubinga/bubinga.c +++ b/board/amcc/bubinga/bubinga.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + long int spd_sdram(void); int board_early_init_f(void) @@ -55,7 +57,9 @@ int checkboard(void) initdram() reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration ------------------------------------------------------------------------- */ -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index bb5c5ee449534d4547d63b639e553c1a93fbc524..9bedb5bc8e3ba1eccb63ef8c52d7e075e69d55fd 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -20,6 +20,8 @@ #include <asm/io.h> #include <asm/ppc440.h> +DECLARE_GLOBAL_DATA_PTR; + /*-----------------------------------------------------------------------------+ * Prototypes *-----------------------------------------------------------------------------*/ @@ -31,7 +33,7 @@ extern void denali_core_search_data_eye(void); * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -phys_size_t initdram(void) +int initdram(void) { #if !defined(CONFIG_SYS_RAMBOOT) ulong speed = get_bus_freq(0); @@ -88,5 +90,7 @@ phys_size_t initdram(void) */ set_mcsr(get_mcsr()); - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c index ca933d71a659f5b0bb29008c601231a19cc26527..2a2441e101e208192ec88a210220665cf4097d12 100644 --- a/board/amcc/walnut/walnut.c +++ b/board/amcc/walnut/walnut.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <spd_sdram.h> +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { /*-------------------------------------------------------------------------+ @@ -74,7 +76,9 @@ int checkboard(void) * initdram() reads EEPROM via I2c. EEPROM contains all of * the necessary info for SDRAM controller configuration */ -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index f61978c5d5ebc7d484ed16d24bdbd5d79495fd30..fde371d919dc766d22b828ba8b4a6f0ce6d05b91 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -286,7 +286,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value) *tr1_value = (first_good + last_bad) / 2; } -phys_size_t initdram(void) +int initdram(void) { register uint reg; int tr1_bank1, tr1_bank2; @@ -334,7 +334,10 @@ phys_size_t initdram(void) sdram_tr1_set(0x08000000, &tr1_bank2); mtsdram(SDRAM0_TR1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800)); - return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */ + gd->ram_size = CONFIG_SYS_SDRAM_BANKS * + (CONFIG_SYS_KBYTES_SDRAM * 1024); /* set bytes */ + + return 0; } /************************************************************************* diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c index 70fcd619980e454388fbb67af674f109915d9054..da281e87fc49e796b78d0b01acc2d4c6330b3f7c 100644 --- a/board/astro/mcf5373l/mcf5373l.c +++ b/board/astro/mcf5373l/mcf5373l.c @@ -27,7 +27,7 @@ int checkboard(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { #if !defined(CONFIG_MONITOR_IS_IN_RAM) sdram_t *sdp = (sdram_t *)(MMAP_SDRAM); @@ -79,8 +79,10 @@ phys_size_t initdram(void) * (Do not rely on the SDCS register(s) being set to 0x00000000 * during reset as stated in the data sheet.) */ - return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000 - CONFIG_SYS_SDRAM_BASE); + + return 0; } #define UART_BASE MMAP_UART0 diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c index ba9930d370030130c9d33ba5d334f96f09175571..41194ecb7e74a2bc70569f199974cc6f92acc994 100644 --- a/board/canmb/canmb.c +++ b/board/canmb/canmb.c @@ -18,6 +18,8 @@ #include "mt48lc16m32s2-75.h" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -65,7 +67,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -163,7 +165,9 @@ phys_size_t initdram(void) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index 2ac9fd9cd13692499c1cba2e764340ed30513b95..be0d65c694eb8b1fd3d1ef96d1ebe781b851b169 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -97,7 +97,7 @@ static mem_conf_t* get_mem_config(int board_type) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; #ifndef CONFIG_SYS_RAMBOOT @@ -150,7 +150,9 @@ phys_size_t initdram(void) *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; __asm__ volatile ("sync"); - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c index 9d4554da1fe5099838e82aeead5d63893de5f532..48366763c10ce6a5e357c5c7416b7eb3034a7969 100644 --- a/board/cobra5272/cobra5272.c +++ b/board/cobra5272/cobra5272.c @@ -8,6 +8,7 @@ #include <common.h> #include <asm/immap.h> +DECLARE_GLOBAL_DATA_PTR; int checkboard (void) { @@ -16,7 +17,7 @@ int checkboard (void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM); @@ -26,7 +27,9 @@ phys_size_t initdram(void) /* Dummy write to start SDRAM */ *((volatile unsigned long *) 0) = 0; - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram (void) diff --git a/board/davedenx/aria/aria.c b/board/davedenx/aria/aria.c index 709c65ba0d626c1465784900f5199b6b488371c2..f0be2cbb9bcdfc9eccbb21372d9f5a38c782523a 100644 --- a/board/davedenx/aria/aria.c +++ b/board/davedenx/aria/aria.c @@ -18,9 +18,11 @@ DECLARE_GLOBAL_DATA_PTR; -phys_size_t initdram(void) +int initdram(void) { - return fixed_sdram(NULL, NULL, 0); + gd->ram_size = fixed_sdram(NULL, NULL, 0); + + return 0; } int misc_init_r(void) diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index cf2f88047d486011096c23a60a1f14ed4597417a..ea7cb744dba9bad959d0eba1d62bb2900c22b942 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -11,11 +11,15 @@ #include <asm/mipsregs.h> #include <asm/io.h> -phys_size_t initdram(void) +DECLARE_GLOBAL_DATA_PTR; + +int initdram(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return MEM_SIZE*1024*1024; + gd->ram_size = MEM_SIZE * 1024 * 1024; + + return 0; } #define BCSR_PCMCIA_PC0DRVEN 0x0010 diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c index b8eb32b1fb713f7fa7338ad35dfaf59e6cc1b6fa..80963fefa508987c331190fbf6b6299b00b2d4c3 100644 --- a/board/esd/mecp5123/mecp5123.c +++ b/board/esd/mecp5123/mecp5123.c @@ -62,9 +62,11 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { - return get_ram_size(0, fixed_sdram(NULL, NULL, 0)); + gd->ram_size = get_ram_size(0, fixed_sdram(NULL, NULL, 0)); + + return 0; } int misc_init_r(void) diff --git a/board/esd/pmc440/sdram.c b/board/esd/pmc440/sdram.c index 82ee289aa61c11b8b1b3822a454559c692e6f731..e962d4c4bb41429d6d3b8da1206ae11df6192685 100644 --- a/board/esd/pmc440/sdram.c +++ b/board/esd/pmc440/sdram.c @@ -24,6 +24,8 @@ #include <asm/mmu.h> #include <asm/ppc440.h> +DECLARE_GLOBAL_DATA_PTR; + extern int denali_wait_for_dlllock(void); extern void denali_core_search_data_eye(void); @@ -105,7 +107,7 @@ int initdram_by_rb(int rows, int banks) return 0; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t size; int n; @@ -125,12 +127,14 @@ phys_size_t initdram(void) sdram_conf[n].banks); /* check for suitable configuration */ - if (get_ram_size(CONFIG_SYS_SDRAM_BASE, size) == size) - return size; + if (get_ram_size(CONFIG_SYS_SDRAM_BASE, size) == size) { + gd->ram_size = size; + return 0; + } /* delete TLB entries */ remove_tlb(CONFIG_SYS_SDRAM_BASE, size); } - return 0; + return -ENXIO; } diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c index bf6ee7a73dc8fa732e7b3600ac50311dcfa48d4d..0e7f8b130a34f602cca5bfe98727b957d00e5d6d 100644 --- a/board/esd/vme8349/vme8349.c +++ b/board/esd/vme8349/vme8349.c @@ -26,15 +26,17 @@ #include <i2c.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + void ddr_enable_ecc(unsigned int dram_size); -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main memory */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -52,7 +54,9 @@ phys_size_t initdram(void) msize = get_ram_size(0, msize); /* return total bus SDRAM size(bytes) -- DDR */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c index d070104618af5bbcc6f236f890c6602b50de9197..085323132c5b41b1e03512167a98be633f91e940 100644 --- a/board/freescale/b4860qds/ddr.c +++ b/board/freescale/b4860qds/ddr.c @@ -176,7 +176,7 @@ found: popts->cpo_sample = 0x3e; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -189,7 +189,9 @@ phys_size_t initdram(void) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo, diff --git a/board/freescale/b4860qds/spl.c b/board/freescale/b4860qds/spl.c index 17e2ba8953d6f5f2763183cd0ea308637d7b761a..a27ad7fa842cf2614d2552071e5c913beb424473 100644 --- a/board/freescale/b4860qds/spl.c +++ b/board/freescale/b4860qds/spl.c @@ -108,7 +108,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) puts("\n\n"); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT nand_boot(); diff --git a/board/freescale/c29xpcie/spl.c b/board/freescale/c29xpcie/spl.c index 785c859beedeacebd4bc241f78f02a688f2e86e1..86d55bf2ac28dc4f5e5f301f035004e501e8f406 100644 --- a/board/freescale/c29xpcie/spl.c +++ b/board/freescale/c29xpcie/spl.c @@ -67,7 +67,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT puts("TPL\n"); diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c index 75de247a51e6ff76d51643aa1bd239abc8d4cbdf..ad93abf9f413dddd3693b5250daac2e323447f66 100644 --- a/board/freescale/corenet_ds/ddr.c +++ b/board/freescale/corenet_ds/ddr.c @@ -260,7 +260,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -278,5 +278,7 @@ phys_size_t initdram(void) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 99a4984fbcf9f8e670590cc3bf20eac3a566d63d..8e8cd37b8b0ac516f54dcdff8e5979555568bd89 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -164,7 +164,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -179,7 +179,9 @@ phys_size_t initdram(void) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } void dram_init_banksize(void) diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 57314e2c9fd8c2b30a06d486edf902422daa6b9f..909fc5627515cdecb3d7d1cd3e3ee07ee1778ba3 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -162,9 +162,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(); - - return 0; + return initdram(); } #ifdef CONFIG_FSL_ESDHC diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c index 817c91a34af2a42469bb1cccacf482ae89d89165..db350e27b897353455f37970988199fa41eeecc9 100644 --- a/board/freescale/ls1043aqds/ddr.c +++ b/board/freescale/ls1043aqds/ddr.c @@ -108,7 +108,7 @@ found: #endif } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -125,5 +125,7 @@ phys_size_t initdram(void) fsl_dp_ddr_restore(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 755aef384e72861477232a23364ff49ba58c80ca..538bba53da9997de5ed53c4dd9102232d1f1b8ea 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -153,7 +153,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(); + initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index b5c5b2ede3819df54f0690fc75ca9677285cd655..2f133db0a6317bf8f4427f3e1998757b6d1374ca 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -170,7 +170,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -186,5 +186,7 @@ phys_size_t initdram(void) fsl_dp_ddr_restore(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c index 6a5cbbf7394b613c44bae903dff324e192f9fb45..481ed440468e82af6b187743ffe3d9667e532489 100644 --- a/board/freescale/ls1046aqds/ddr.c +++ b/board/freescale/ls1046aqds/ddr.c @@ -92,7 +92,7 @@ found: popts->cpo_sample = 0x70; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -110,5 +110,7 @@ phys_size_t initdram(void) erratum_a008850_post(); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index f30dd233519cb88412aea37d38e3e8370f4999c2..6238852af55a8a7bf17c7ee54adbc8e328a5dc53 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -149,7 +149,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - gd->ram_size = initdram(); + initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index 1e995380220899f95b1be0686712d615e14f0c6b..d1290e27f8d65556a6138b139c5f4aaad8381bec 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -96,7 +96,7 @@ found: popts->cpo_sample = 0x70; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -110,5 +110,7 @@ phys_size_t initdram(void) erratum_a008850_post(); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/ls2080a/ddr.c b/board/freescale/ls2080a/ddr.c index 0bff922f07ea1b72ac732cd6f80949e737b87a8f..d340c4162dc0577f620ff1929ad7e224d3ee03e9 100644 --- a/board/freescale/ls2080a/ddr.c +++ b/board/freescale/ls2080a/ddr.c @@ -158,14 +158,12 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, return 0; } #endif -phys_size_t initdram(void) +int initdram(void) { - phys_size_t dram_size; - puts("Initializing DDR...."); puts("using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); - return dram_size; + return 0; } diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index bd32c54fc15be96f69edb403a2239135fef79138..1e9145d6ab28de1abb5c67e43c91d5ef6ad3b52a 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -155,17 +155,15 @@ found: } } -phys_size_t initdram(void) +int initdram(void) { - phys_size_t dram_size; - #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) - return fsl_ddr_sdram_size(); + gd->ram_size = fsl_ddr_sdram_size(); #else puts("Initializing DDR....using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); #endif - return dram_size; + return 0; } diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index b00e575ea29db03ddfbbe8c83c357abc85e4f37e..029ea61b959049c7589683d0f7bf0411a638b327 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -158,17 +158,15 @@ found: } } -phys_size_t initdram(void) +int initdram(void) { - phys_size_t dram_size; - #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) - return fsl_ddr_sdram_size(); + gd->ram_size = fsl_ddr_sdram_size(); #else puts("Initializing DDR....using SPD\n"); - dram_size = fsl_ddr_sdram(); + gd->ram_size = fsl_ddr_sdram(); #endif - return dram_size; + return 0; } diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c index 612275088232426b6ab52258e84b2fea11a88a97..edf486acc8671ff10574d5a00572835a315e0cab 100644 --- a/board/freescale/m5208evbe/m5208evbe.c +++ b/board/freescale/m5208evbe/m5208evbe.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -68,7 +68,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m52277evb/m52277evb.c b/board/freescale/m52277evb/m52277evb.c index 571e1a6528aecb91d17dc867026b276318efece4..2873643582882b488f13019e7a322c3d75ad1490 100644 --- a/board/freescale/m52277evb/m52277evb.c +++ b/board/freescale/m52277evb/m52277evb.c @@ -21,7 +21,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { u32 dramsize; @@ -78,7 +78,9 @@ phys_size_t initdram(void) udelay(100); #endif - return (dramsize); + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index 7aa0edfdc1958619dccf3ed3bf6aadc37491133e..1d82e937862dc555470ab50fe40af823f6af4f55 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); gpio_t *gpio = (gpio_t *)(MMAP_GPIO); @@ -97,7 +97,9 @@ phys_size_t initdram(void) *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696; } - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c index b8544292a7474cf5f5965aba3bdc85076fb10f66..d3c2acd08985e208b4bb701c489c308e74043704 100644 --- a/board/freescale/m5249evb/m5249evb.c +++ b/board/freescale/m5249evb/m5249evb.c @@ -10,6 +10,8 @@ #include <malloc.h> #include <asm/immap.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard (void) { ulong val; uchar val8; @@ -29,7 +31,7 @@ int checkboard (void) { }; -phys_size_t initdram(void) +int initdram(void) { unsigned long junk = 0xa5a59696; @@ -82,7 +84,9 @@ phys_size_t initdram(void) mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */ *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */ - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index fef2ca6af6d45ab12c73ac6cb420a89b617b2418..1c100e6d8c969be7addedb7be133e059b282b209 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -13,6 +13,8 @@ #include <netdev.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Board: "); @@ -20,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { u32 dramsize = 0; @@ -73,7 +75,9 @@ phys_size_t initdram(void) mb(); } - return dramsize; + gd->ram_size = dramsize; + + return 0; } int testdram(void) diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c index 3f4cdfbaf1418151126f4a9de86cd6afb735271d..eae499fa9dbaf90e8569184a843b1db8b814f863 100644 --- a/board/freescale/m5253evbe/m5253evbe.c +++ b/board/freescale/m5253evbe/m5253evbe.c @@ -12,6 +12,8 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Board: "); @@ -19,7 +21,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { /* * Check to see if the SDRAM has already been initialized @@ -66,7 +68,9 @@ phys_size_t initdram(void) *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5; } - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; } int testdram(void) diff --git a/board/freescale/m5272c3/m5272c3.c b/board/freescale/m5272c3/m5272c3.c index 9fab24ebb9de422fed009e7ef1153c13700064de..bbe06ba9dfc59d1153da109efdbf3a86cc93280a 100644 --- a/board/freescale/m5272c3/m5272c3.c +++ b/board/freescale/m5272c3/m5272c3.c @@ -11,6 +11,7 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; int checkboard (void) { puts ("Board: "); @@ -18,7 +19,7 @@ int checkboard (void) { return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM); @@ -28,7 +29,9 @@ phys_size_t initdram(void) /* Dummy write to start SDRAM */ *((volatile unsigned long *)0) = 0; - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram (void) { diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c index 00ce582249811b783ac5618ef1467345f03349b5..48ad4a86b9e33563644ee942670bb10c6084f985 100644 --- a/board/freescale/m5275evb/m5275evb.c +++ b/board/freescale/m5275evb/m5275evb.c @@ -13,6 +13,8 @@ #include <asm/immap.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + #define PERIOD 13 /* system bus period in ns */ #define SDRAM_TREFI 7800 /* in ns */ @@ -23,7 +25,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdramctrl_t *sdp = (sdramctrl_t *)(MMAP_SDRAM); gpio_t *gpio_reg = (gpio_t *)(MMAP_GPIO); @@ -88,7 +90,9 @@ phys_size_t initdram(void) | MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1) | MCF_SDRAMC_SDCR_DQS_OE(0x3)); - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c index 19e56957bdda4e55f7b878e8b385c0229a7ecab2..7f3c04c37914bfd8882ce67b630dd8ed2c3bb992 100644 --- a/board/freescale/m5282evb/m5282evb.c +++ b/board/freescale/m5282evb/m5282evb.c @@ -16,7 +16,7 @@ int checkboard (void) return 0; } -phys_size_t initdram(void) +int initdram(void) { u32 dramsize, i, dramclk; @@ -80,5 +80,7 @@ phys_size_t initdram(void) /* Write to the SDRAM Mode Register */ *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696; } - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c index 821e663b914d09a19b1b59011846615d49513502..b0c27b4967037ae3a1d5755f82b58e5478dfbbb1 100644 --- a/board/freescale/m53017evb/m53017evb.c +++ b/board/freescale/m53017evb/m53017evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -68,7 +68,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c index c4613a4cbda2e9e68272ff5f91aa5ac0fab14593..5609a7b3766f9001d7b7e8d5929c3280672d60a1 100644 --- a/board/freescale/m5329evb/m5329evb.c +++ b/board/freescale/m5329evb/m5329evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -62,7 +62,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c index f1ddee1378679e2bd506c2523f10c503a7ba3da6..48a262c12ffc38eceb7178e7ab2a8e9dec5e8f50 100644 --- a/board/freescale/m5373evb/m5373evb.c +++ b/board/freescale/m5373evb/m5373evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); u32 dramsize, i; @@ -62,7 +62,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54418twr/m54418twr.c b/board/freescale/m54418twr/m54418twr.c index c3bee185d875543173f8ec180008ebfc8ff56e62..3f1100c3557bd938d5dbbde98402aa30322fa382 100644 --- a/board/freescale/m54418twr/m54418twr.c +++ b/board/freescale/m54418twr/m54418twr.c @@ -25,7 +25,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { u32 dramsize; @@ -104,7 +104,9 @@ phys_size_t initdram(void) udelay(100); #endif - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54451evb/m54451evb.c b/board/freescale/m54451evb/m54451evb.c index a4d11b6815e1661d50d8d8f5b9df5e264542567d..653a11352cca5d554957e03eada05a0b85d90283 100644 --- a/board/freescale/m54451evb/m54451evb.c +++ b/board/freescale/m54451evb/m54451evb.c @@ -26,7 +26,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { u32 dramsize; #ifdef CONFIG_CF_SBF @@ -82,7 +82,9 @@ phys_size_t initdram(void) udelay(100); #endif - return (dramsize); + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 3bdcc332b6c3302fcadf4e7986c88cb755a1ad87..b9850c1a2a28354226602f5cce7d5f02e892e768 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -22,7 +22,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { u32 dramsize; #ifdef CONFIG_CF_SBF @@ -75,7 +75,9 @@ phys_size_t initdram(void) udelay(100); #endif - return (dramsize << 1); + gd->ram_size = dramsize << 1; + + return 0; }; int testdram(void) diff --git a/board/freescale/m547xevb/m547xevb.c b/board/freescale/m547xevb/m547xevb.c index e84a5ac4eb94e4a2de129f5cbe0369e56549f87e..fc674522f64641c0c5d12f7906b50404aa5692db 100644 --- a/board/freescale/m547xevb/m547xevb.c +++ b/board/freescale/m547xevb/m547xevb.c @@ -23,7 +23,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { siu_t *siu = (siu_t *) (MMAP_SIU); sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); @@ -79,7 +79,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c index 06f9a5ede032d2927fb938e1e266ea6a0f06becb..c268ec6a608bfa887b3a5d825230c6e702be2c6e 100644 --- a/board/freescale/m548xevb/m548xevb.c +++ b/board/freescale/m548xevb/m548xevb.c @@ -23,7 +23,7 @@ int checkboard(void) return 0; }; -phys_size_t initdram(void) +int initdram(void) { siu_t *siu = (siu_t *) (MMAP_SIU); sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); @@ -79,7 +79,9 @@ phys_size_t initdram(void) udelay(100); - return dramsize; + gd->ram_size = dramsize; + + return 0; }; int testdram(void) diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index e134091468b42debe3879018af9feb6af599ac39..a0e5d91c8fd45411624b647ee23333d043655dce 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -95,7 +95,7 @@ int is_micron(void){ return(ismicron); } -phys_size_t initdram(void) +int initdram(void) { u32 msize = 0; /* @@ -167,7 +167,9 @@ phys_size_t initdram(void) sizeof(elpida_init_sequence)/sizeof(u32)); } - return msize; + gd->ram_size = msize; + + return 0; } int misc_init_r(void) diff --git a/board/freescale/mpc8308rdb/sdram.c b/board/freescale/mpc8308rdb/sdram.c index ed1e84e0033955261fd8b3ffb163b2d75aaba866..aac56c3983c3b4d381e4041a9a00e2dc6c1e51a9 100644 --- a/board/freescale/mpc8308rdb/sdram.c +++ b/board/freescale/mpc8308rdb/sdram.c @@ -65,17 +65,19 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index ce6fce539987addd8a28fa8bc1c3102ecfbf3b2c..4e5dfe6f15728fd21bc8a3f54b126dbcf5956546 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -97,14 +97,14 @@ static long fixed_sdram(void) return msize; } -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; volatile fsl_lbc_t *lbc = &im->im_lbc; u32 msize; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ msize = fixed_sdram(); @@ -120,5 +120,7 @@ phys_size_t initdram(void) #endif /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c index fd8968c71cb08f763141ad64c5a8713e105e9ac2..947ffabbb5b79b8ddc60498e1755750ec606613f 100644 --- a/board/freescale/mpc8315erdb/sdram.c +++ b/board/freescale/mpc8315erdb/sdram.c @@ -92,13 +92,13 @@ static long fixed_sdram(void) } #endif /* CONFIG_SYS_RAMBOOT */ -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); @@ -106,6 +106,8 @@ phys_size_t initdram(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) resume_from_sleep(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c index f9f9a410c53f8a1fa9fc6dc98e910df08582a0f9..e7d8b99738c3ebf0a8dc00f08c762705c6d6e438 100644 --- a/board/freescale/mpc8323erdb/mpc8323erdb.c +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c @@ -21,6 +21,8 @@ #endif #include <asm/mmu.h> +DECLARE_GLOBAL_DATA_PTR; + const qe_iop_conf_t qe_iop_conf_tab[] = { /* UCC3 */ {1, 0, 1, 0, 1}, /* TxD0 */ @@ -68,21 +70,23 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { int fixed_sdram(void); -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } /************************************************************************* diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c index d66ad33bf5e70598a5d9eeaa0f3162ce4df90568..907ad09dc8e09024b5c9df72062dddc3f13b3a33 100644 --- a/board/freescale/mpc832xemds/mpc832xemds.c +++ b/board/freescale/mpc832xemds/mpc832xemds.c @@ -23,6 +23,8 @@ #include "../common/pq-mds-pib.h" #endif +DECLARE_GLOBAL_DATA_PTR; + const qe_iop_conf_t qe_iop_conf_tab[] = { /* ETH3 */ {1, 0, 1, 0, 1}, /* TxD0 */ @@ -88,21 +90,23 @@ int board_early_init_r(void) int fixed_sdram(void); -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } /************************************************************************* diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 3bcfe03065b3715ecd52f91958df0369ae725ebc..595bce16d10b958745f29661cf799011ade38a18 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -22,6 +22,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + int fixed_sdram(void); void sdram_init(void); @@ -46,13 +48,13 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; phys_size_t msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -73,8 +75,10 @@ phys_size_t initdram(void) */ sdram_init(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index 01eac0260fa840b4aa1ce779dfcbc8b045723987..27f0ccd9a6c05fa5ad5fa1ce23659824d2372a5a 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -20,6 +20,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SPD_EEPROM /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. @@ -116,7 +118,7 @@ volatile static struct pci_controller hose[] = { }; #endif /* CONFIG_PCI */ -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; @@ -125,7 +127,7 @@ phys_size_t initdram(void) #endif if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; @@ -144,7 +146,9 @@ phys_size_t initdram(void) #endif /* return total bus RAM size(bytes) */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 0463940baebc109838701d0909a0f424a9fd8013..a3af246854899f4f8996e55aaa0f06984155aeaf 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -20,6 +20,8 @@ #include "pci.h" #include "../common/pq-mds-pib.h" +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; @@ -216,13 +218,13 @@ extern void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; #if defined(CONFIG_SPD_EEPROM) msize = spd_sdram(); @@ -236,7 +238,9 @@ phys_size_t initdram(void) #endif /* return total bus DDR size(bytes) */ - return (msize * 1024 * 1024); + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index d81778549c482e60e70fc1fa306f897068557ad1..2f5431ee21d7b097fb6d7c12ab1deeed5a5da3c5 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -16,6 +16,8 @@ #include <vsc7385.h> #include <fsl_esdhc.h> +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_SYS_DRAM_TEST) int testdram(void) @@ -60,13 +62,13 @@ void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; + return -ENXIO; #if defined(CONFIG_SPD_EEPROM) msize = spd_sdram(); @@ -79,7 +81,9 @@ phys_size_t initdram(void) ddr_enable_ecc(msize * 1024 * 1024); #endif /* return total bus DDR size(bytes) */ - return (msize * 1024 * 1024); + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 7668226321d0583274c60985e57dd74b0e3238dc..0422208133a0542461195bb5e38b5ba78e4194d3 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -19,6 +19,8 @@ #include <spd_sdram.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + void sdram_init(void); phys_size_t fixed_sdram(void); int mpc8610hpcd_diu_init(void); @@ -116,7 +118,7 @@ int checkboard(void) } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = 0; @@ -129,7 +131,9 @@ phys_size_t initdram(void) setup_ddr_bat(dram_size); debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 10764425169683bba916f2b5700c9365e1dc7047..07cb08b6b8cfbd477a83634c11295a53dd0dda6d 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -16,6 +16,8 @@ #include <fdt_support.h> #include <netdev.h> +DECLARE_GLOBAL_DATA_PTR; + phys_size_t fixed_sdram(void); int checkboard(void) @@ -37,7 +39,7 @@ int checkboard(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = 0; @@ -50,7 +52,9 @@ phys_size_t initdram(void) setup_ddr_bat(dram_size); debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index 05da1dac7d550cd9c06f251251845eb217c87a19..0565367937d0d8505377990540472b287efbef1a 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -94,7 +94,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT puts("\nTertiary program loader running in sram..."); #else diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c index 77ed2577f990410232b46113457f77e4c26f4e4f..1f490dc94378d8ef9ff19ee9ceaa588f713b7925 100644 --- a/board/freescale/p1022ds/spl.c +++ b/board/freescale/p1022ds/spl.c @@ -111,7 +111,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 3357702dbabb5fcb00d8c5210ee28ede2ad96b44..67637390be6558c8e65a362495d2ed904aa04cdf 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -108,7 +108,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_NAND_BOOT puts("Tertiary program loader running in sram..."); #else diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c index b07bd98fb176b97e136b09bc2dc3736068ee7481..3df8d217256bb7aa27c834e9efadb39ebf521057 100644 --- a/board/freescale/p2041rdb/ddr.c +++ b/board/freescale/p2041rdb/ddr.c @@ -12,6 +12,8 @@ #include <fsl_ddr_dimm_params.h> #include <asm/fsl_law.h> +DECLARE_GLOBAL_DATA_PTR; + struct board_specific_parameters { u32 n_ranks; u32 datarate_mhz_high; @@ -116,7 +118,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = 0; @@ -127,12 +129,14 @@ phys_size_t initdram(void) dram_size = fsl_ddr_sdram(); } else { puts("no SPD and fixed parameters\n"); - return dram_size; + return -ENXIO; } dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xqds/ddr.c b/board/freescale/t102xqds/ddr.c index 507929bb707685f537776ede2d70ddc9af80cd24..93003c25d866c611944658b3a0c4ef61ca019d22 100644 --- a/board/freescale/t102xqds/ddr.c +++ b/board/freescale/t102xqds/ddr.c @@ -169,7 +169,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -187,5 +187,7 @@ phys_size_t initdram(void) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xqds/spl.c b/board/freescale/t102xqds/spl.c index a1481e9b630d0fb081bbca1c761c2fa518d601fd..c847b01e7e0b6535839491e1f334b9c7b3baf9ba 100644 --- a/board/freescale/t102xqds/spl.c +++ b/board/freescale/t102xqds/spl.c @@ -142,7 +142,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c index 56f98ac2f9f34ccdfa059999377992d411c34811..773aa77781d66209297a2dba9143953066df3612 100644 --- a/board/freescale/t102xrdb/ddr.c +++ b/board/freescale/t102xrdb/ddr.c @@ -229,7 +229,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -249,5 +249,7 @@ phys_size_t initdram(void) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index f70a337512bb814f8b33abb3b9cf7ee0acb6a539..5be71628afd5aa864accb2b587b4d616800f58bc 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -129,7 +129,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c index a5d3e54cfe810d6f2f89ac5a7358ae4b658f9ca9..d23787d43a22e8b0f74c1c665d8c9aa1af43919b 100644 --- a/board/freescale/t1040qds/ddr.c +++ b/board/freescale/t1040qds/ddr.c @@ -117,7 +117,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -134,5 +134,7 @@ phys_size_t initdram(void) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 4a09cae782c53d60bb612a7ef4418dca8a3dfcdc..b99ab953977b634e1ddd57a16a7dce15126f2474 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -120,7 +120,7 @@ void board_mem_sleep_setup(void) } #endif -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -137,5 +137,7 @@ phys_size_t initdram(void) fsl_dp_resume(); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index 076641c1ec437c77d2db314dcefc3c584e49a327..899691a7794a5f666da73bc639d610a7bf2be7a9 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -125,7 +125,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) puts("\n\n"); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c index 044ac18562a27eba64e5f3f2b7a57f805a6bf774..adc109042bdfc7b5b59e566da2614864295e27a2 100644 --- a/board/freescale/t208xqds/ddr.c +++ b/board/freescale/t208xqds/ddr.c @@ -104,7 +104,7 @@ found: popts->cpo_sample = 0x64; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -118,5 +118,7 @@ phys_size_t initdram(void) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c index caa4de3e7f8be3b64afb2f527b28e709e8a2a1d3..3e713dc2c365eb1e6c2c9700f3dabf15bac5e716 100644 --- a/board/freescale/t208xqds/spl.c +++ b/board/freescale/t208xqds/spl.c @@ -128,7 +128,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c index bcb536ae1bf8526f1bc2663963b2c6edebee1f0f..b4ad615846a65697f2642ef61d3986f883c326d2 100644 --- a/board/freescale/t208xrdb/ddr.c +++ b/board/freescale/t208xrdb/ddr.c @@ -97,7 +97,7 @@ found: popts->cpo_sample = 0x54; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -111,5 +111,7 @@ phys_size_t initdram(void) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c index 44be70be87d1981d9c4b92a8ba7234d1e5d40c59..a5f940c6f6356a4d60820b51f91fa31cf597229e 100644 --- a/board/freescale/t208xrdb/spl.c +++ b/board/freescale/t208xrdb/spl.c @@ -98,7 +98,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c index 24b187256041207f7b0f9aef36598c94d1c132ab..84ff792225450b757ee1360f79a5d3c9b386da90 100644 --- a/board/freescale/t4qds/ddr.c +++ b/board/freescale/t4qds/ddr.c @@ -112,7 +112,7 @@ found: popts->cpo_sample = 0x63; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -127,5 +127,7 @@ phys_size_t initdram(void) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t4qds/spl.c b/board/freescale/t4qds/spl.c index bda0003565de8bf6c8ed45a68a5d7f60323b3c12..05feedecc25aba1ef0cb6c63939c9bc575e25e08 100644 --- a/board/freescale/t4qds/spl.c +++ b/board/freescale/t4qds/spl.c @@ -133,7 +133,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c index 8596ccde1b5ff28f6242f55a7720564ca607ba67..d03baa3f45d2591a34d9ebe1e7e28c1c6ecaa2cc 100644 --- a/board/freescale/t4rdb/ddr.c +++ b/board/freescale/t4rdb/ddr.c @@ -105,7 +105,7 @@ found: popts->cpo_sample = 0x64; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -120,5 +120,7 @@ phys_size_t initdram(void) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c index d3a86e6599dd8fba269205259f4e75fde918f4a1..e96f3d38c56e168aafbf556a2306cd23ce62a96a 100644 --- a/board/freescale/t4rdb/spl.c +++ b/board/freescale/t4rdb/spl.c @@ -91,7 +91,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) i2c_init_all(); - gd->ram_size = initdram(); + initdram(); mmc_boot(); } diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c index ecdc7e72d336b62e10f9e05f2205b77a7c38011e..4ceb48b09d825caa377616c7b3422f9c047b4c03 100644 --- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c +++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -10,9 +10,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(void) +int initdram(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c index 66fe5a53b04d6f6cb43645ac4e3118dd6ba69de3..12d8c1025c3181b5903315bafe001cc4839885ea 100644 --- a/board/gaisler/gr_ep2s60/gr_ep2s60.c +++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -10,9 +10,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(void) +int initdram(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c index 1725459af8ff5d425a78e7301d8c90d6d5073f1d..02beb5c926ebe6e8dce5c426e46bdd8711bec829 100644 --- a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c +++ b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c @@ -9,9 +9,11 @@ #include <config.h> #include <asm/leon.h> -phys_size_t initdram(void) +int initdram(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/grsim/grsim.c b/board/gaisler/grsim/grsim.c index fa097377df06289cb3bc7bcc6bee15626c8ad628..aa9ba50877c9b6c62eea5da4c9aeb78e9fe50f20 100644 --- a/board/gaisler/grsim/grsim.c +++ b/board/gaisler/grsim/grsim.c @@ -10,9 +10,11 @@ #include <common.h> #include <asm/leon.h> -phys_size_t initdram(void) +int initdram(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gaisler/grsim_leon2/grsim_leon2.c b/board/gaisler/grsim_leon2/grsim_leon2.c index 12df6bd7efa6c499015fc0300db3a7bed98a7a31..384db3d84bcf07daf14ecce57e136c046299ef3f 100644 --- a/board/gaisler/grsim_leon2/grsim_leon2.c +++ b/board/gaisler/grsim_leon2/grsim_leon2.c @@ -10,9 +10,11 @@ #include <common.h> #include <asm/leon.h> -phys_size_t initdram(void) +int initdram(void) { - return 1; + /* Does not set gd->ram_size here */ + + return 0; } int checkboard(void) diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c index b7b31fb0242fe7eaf6b591a2fc752e32f131120f..5b67a013da7eb0719f4c235dc921414098e0585f 100644 --- a/board/gdsys/mpc8308/sdram.c +++ b/board/gdsys/mpc8308/sdram.c @@ -66,17 +66,19 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; /* DDR SDRAM */ msize = fixed_sdram(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c index b40e4b30e8752fe0e41db62d93c229577eb4e36a..d8e6701fac545ab6be4122679c9e5962ea786a40 100644 --- a/board/ids/ids8313/ids8313.c +++ b/board/ids/ids8313/ids8313.c @@ -119,14 +119,14 @@ static int setup_sdram(void) return msize; } -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; fsl_lbc_t *lbc = &im->im_lbc; u32 msize = 0; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; msize = setup_sdram(); @@ -134,7 +134,9 @@ phys_size_t initdram(void) out_be32(&lbc->mrtpr, CONFIG_SYS_LBC_MRTPR); sync(); - return msize; + gd->ram_size = msize; + + return 0; } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/ifm/ac14xx/ac14xx.c b/board/ifm/ac14xx/ac14xx.c index b107dd196cc14c3e7f22cb0803d27a6d67bb3e26..129eb47b0e13334cea42ad8ae0b675ac4ab95b9b 100644 --- a/board/ifm/ac14xx/ac14xx.c +++ b/board/ifm/ac14xx/ac14xx.c @@ -310,9 +310,12 @@ u32 sdram_init_seq[] = { /* EMPTY, optional, we don't do it */ }; -phys_size_t initdram(void) +int initdram(void) { - return fixed_sdram(NULL, sdram_init_seq, ARRAY_SIZE(sdram_init_seq)); + gd->ram_size = fixed_sdram(NULL, sdram_init_seq, + ARRAY_SIZE(sdram_init_seq)); + + return 0; } int misc_init_r(void) diff --git a/board/ifm/o2dnt2/o2dnt2.c b/board/ifm/o2dnt2/o2dnt2.c index 7452d2b1f0ec116c3c9d55662b304057c17012bd..4f81007ead113e1dc4e2b044d62c374e90dc93a9 100644 --- a/board/ifm/o2dnt2/o2dnt2.c +++ b/board/ifm/o2dnt2/o2dnt2.c @@ -66,7 +66,7 @@ static void sdram_start(int hi_addr) * use of CONFIG_SYS_SDRAM_BASE. The code does not work if * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { struct mpc5xxx_mmap_ctl *mmap_ctl = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -181,7 +181,9 @@ phys_size_t initdram(void) (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32(&sdram->sdelay, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c index c841bf02a322a5e00aa1e3af5b249f1b61d8b7f9..b92ff2aa885aeb60e1831342082d1b23d27c2621 100644 --- a/board/imgtec/boston/ddr.c +++ b/board/imgtec/boston/ddr.c @@ -10,11 +10,16 @@ #include "boston-regs.h" -phys_size_t initdram(void) +DECLARE_GLOBAL_DATA_PTR; + +int initdram(void) { u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0); - return (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << 30; + gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << + 30; + + return 0; } ulong board_get_usable_ram_top(ulong total_size) diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index c269d0a5a35d7ffe905e8c5dcd8b46431d75afd2..f8c65b0e46d517096bf0123a11119806ece3e457 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -19,6 +19,8 @@ #include "superio.h" +DECLARE_GLOBAL_DATA_PTR; + enum core_card { CORE_UNKNOWN, CORE_LV, @@ -83,9 +85,11 @@ static enum sys_con malta_sys_con(void) } } -phys_size_t initdram(void) +int initdram(void) { - return CONFIG_SYS_MEM_SIZE; + gd->ram_size = CONFIG_SYS_MEM_SIZE; + + return 0; } int checkboard(void) diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c index dc0a088ecb8bb37d83c8143dce7042d8fc2b72f9..8aa7c10bffce3e849133be17e3c55ba17dec5a29 100644 --- a/board/imgtec/xilfpga/xilfpga.c +++ b/board/imgtec/xilfpga/xilfpga.c @@ -11,10 +11,14 @@ #include <common.h> +DECLARE_GLOBAL_DATA_PTR; + /* initialize the DDR Controller and PHY */ -phys_size_t initdram(void) +int initdram(void) { /* MIG IP block is smart and doesn't need SW * to do any init */ - return CONFIG_SYS_SDRAM_SIZE; /* in bytes */ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; /* in bytes */ + + return 0; } diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c index 47c3955c6d8b641b68647f48462e18a1986ca350..2dd9799ea7d33dab3d8e8ed6edd18f35b8228646 100644 --- a/board/inka4x0/inka4x0.c +++ b/board/inka4x0/inka4x0.c @@ -36,6 +36,8 @@ #error "INKA4x0 SDRAM: invalid chip type specified!" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -77,7 +79,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { volatile struct mpc5xxx_mmap_ctl *mm = (struct mpc5xxx_mmap_ctl *) CONFIG_SYS_MBAR; @@ -139,7 +141,9 @@ phys_size_t initdram(void) } #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize; + gd->ram_size = dramsize; + + return 0; } int checkboard (void) diff --git a/board/intercontrol/digsy_mtc/digsy_mtc.c b/board/intercontrol/digsy_mtc/digsy_mtc.c index 9bada940b7d545ccc07624085d7c2f71ec406f32..922d9ef0a17576bc57454e8d01dfbc5b33966283 100644 --- a/board/intercontrol/digsy_mtc/digsy_mtc.c +++ b/board/intercontrol/digsy_mtc/digsy_mtc.c @@ -79,7 +79,7 @@ static void sdram_start(int hi_addr) * CONFIG_SYS_SDRAM_BASE is something other than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -172,7 +172,9 @@ phys_size_t initdram(void) (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) out_be32((void *)MPC5XXX_SDRAM_SDELAY, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard(void) diff --git a/board/ipek01/ipek01.c b/board/ipek01/ipek01.c index ab94c654994c938e84a2d4f665dbae4ec884bd22..ca99332e51b2388be0557ce30323f28d9b1c3155 100644 --- a/board/ipek01/ipek01.c +++ b/board/ipek01/ipek01.c @@ -80,7 +80,7 @@ static void sdram_start (int hi_addr) * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { struct mpc5xxx_mmap_ctl *mmap_ctl = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -135,7 +135,9 @@ phys_size_t initdram(void) */ out_be32 (&sdram->sdelay, 0x04); - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index ae569d0fc004e1aafcd8a7ae5ef06daa5e8bc1c9..d13469136186f95d82d369510ab642c12f97f40f 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -29,6 +29,8 @@ #define SDRAM_CONFIG2 0x88b70004 #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -76,7 +78,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -194,7 +196,9 @@ phys_size_t initdram(void) __asm__ volatile ("sync"); } - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index 12fd05d2f476190e28ed3b1d205845a36fd68530..bbabbcfc0bcaa358a86da3b47b4c5c42d610766e 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -15,6 +15,8 @@ #include <i2c.h> #include "../common/common.h" +DECLARE_GLOBAL_DATA_PTR; + static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; /* @@ -289,7 +291,7 @@ static long probe_sdram(memctl8260_t *memctl) #endif /* CONFIG_SYS_SDRAM_LIST */ -phys_size_t initdram(void) +int initdram(void) { immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; memctl8260_t *memctl = &immap->im_memctl; @@ -305,7 +307,9 @@ phys_size_t initdram(void) icache_enable(); - return psize; + gd->ram_size = psize; + + return 0; } int checkboard(void) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 111a8a7995215e3b145b675f28c5b3aea8bb3cdb..f83fa06e93c69220c2a8a6d40bcf9e98c9024994 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -28,6 +28,8 @@ #include "../common/common.h" +DECLARE_GLOBAL_DATA_PTR; + static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; const qe_iop_conf_t qe_iop_conf_tab[] = { @@ -328,13 +330,13 @@ static int fixed_sdram(void) return msize; } -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) - return -1; + return -ENXIO; out_be32(&im->sysconf.ddrlaw[0].bar, CONFIG_SYS_DDR_BASE & LAWBAR_BAR); @@ -348,7 +350,9 @@ phys_size_t initdram(void) #endif /* return total bus SDRAM size(bytes) -- DDR */ - return msize * 1024 * 1024; + gd->ram_size = msize * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/keymile/kmp204x/ddr.c b/board/keymile/kmp204x/ddr.c index 98fb1adfdd7ba4b6aef8e1eea7bbc01551c8b165..006b80965461b19f840ab935b24f56464498140d 100644 --- a/board/keymile/kmp204x/ddr.c +++ b/board/keymile/kmp204x/ddr.c @@ -14,6 +14,8 @@ #include <fsl_ddr_sdram.h> #include <fsl_ddr_dimm_params.h> +DECLARE_GLOBAL_DATA_PTR; + void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) @@ -48,7 +50,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR_ODT_75ohm; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = 0; @@ -60,5 +62,7 @@ phys_size_t initdram(void) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/liebherr/lwmon5/sdram.c b/board/liebherr/lwmon5/sdram.c index 1932e06fd61ae57acaf0511a67223d37a50dd4f3..f7251e567fcb3345601c10c3ac9c9d1e529b520c 100644 --- a/board/liebherr/lwmon5/sdram.c +++ b/board/liebherr/lwmon5/sdram.c @@ -25,6 +25,8 @@ #include <asm/ppc440.h> #include <watchdog.h> +DECLARE_GLOBAL_DATA_PTR; + /* * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 memory * region. Right now the cache should still be disabled in U-Boot because of the @@ -145,7 +147,7 @@ static void program_ecc(u32 start_address, * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -phys_size_t initdram(void) +int initdram(void) { /* CL=4 */ mtsdram(DDR0_02, 0x00000000); @@ -241,5 +243,7 @@ phys_size_t initdram(void) */ set_mcsr(get_mcsr()); - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } diff --git a/board/micronas/vct/vct.c b/board/micronas/vct/vct.c index f4a6521e94480463a0bb4c7c765e73e31874241e..02824eaf4fcb978499ca7b0dae48a5288be6040a 100644 --- a/board/micronas/vct/vct.c +++ b/board/micronas/vct/vct.c @@ -28,6 +28,8 @@ #define BOARD_NAME_ADD " NOR" #endif +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { /* @@ -59,10 +61,12 @@ void _machine_restart(void) * SDRAM is already configured by the bootstrap code, only return the * auto-detected size here */ -phys_size_t initdram(void) +int initdram(void) { - return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20); + + return 0; } int checkboard(void) diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 3e2fe653bd2758339bfac130eb8b32defb439485..a2520bc3bc98b94ed251ee822880383405d1ce90 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -19,6 +19,8 @@ #include <status_led.h> #endif /* CONFIG_LED_STATUS */ +DECLARE_GLOBAL_DATA_PTR; + /* Kollmorgen DPR initialization data */ struct init_elem { unsigned long addr; @@ -116,7 +118,7 @@ static void sdram_start(int hi_addr) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; #ifndef CONFIG_SYS_RAMBOOT @@ -172,7 +174,9 @@ phys_size_t initdram(void) #endif /* CONFIG_SYS_RAMBOOT */ /* return total ram size */ - return dramsize; + gd->ram_size = dramsize; + + return 0; } diff --git a/board/mpc8308_p1m/sdram.c b/board/mpc8308_p1m/sdram.c index 96d60c95eefca9091ec29eff325b81be57b6b982..e0f4671b17eb3784e2e5b4685c3ecf7846600f35 100644 --- a/board/mpc8308_p1m/sdram.c +++ b/board/mpc8308_p1m/sdram.c @@ -61,7 +61,7 @@ static long fixed_sdram(void) return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); } -phys_size_t initdram(void) +int initdram(void) { immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize; @@ -72,6 +72,8 @@ phys_size_t initdram(void) /* DDR SDRAM */ msize = fixed_sdram(); - /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize; + + return 0; } diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index e2961d1d4acb2f8bb797058aeb9aec77fb203ee1..e6422965f9c6619708da4e96b40f317e379fb1b2 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -622,7 +622,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -phys_size_t initdram(void) +int initdram(void) { unsigned long bank_reg[4], tmp, bank_size; @@ -655,7 +655,9 @@ phys_size_t initdram(void) printf ("ECC "); test_dram (TotalSize * MEGA_BYTE); - return (TotalSize * MEGA_BYTE); + gd->ram_size = TotalSize * MEGA_BYTE; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/mpl/pati/pati.c b/board/mpl/pati/pati.c index 951010a6a3d7bc40ad60843898a92800e7ef00dd..7b7b93f6828bb7b704387fd1ca67456c68e84c0b 100644 --- a/board/mpl/pati/pati.c +++ b/board/mpl/pati/pati.c @@ -55,6 +55,8 @@ asm (GEN_SYMNAME(name) " = " GEN_VALUE(value)) +DECLARE_GLOBAL_DATA_PTR; + /************************************************************************ * Early debug routines */ @@ -133,7 +135,7 @@ extern int mem_test (unsigned long start, unsigned long ramsize, int quiet); /* * Get RAM size. */ -phys_size_t initdram(void) +int initdram(void) { unsigned char board_rev; unsigned long reg; @@ -209,8 +211,10 @@ phys_size_t initdram(void) /* we have a x32 bit bus to the SDRAM, so shift the addr with 2 */ lmr<<=2; in32(CONFIG_SYS_SDRAM_BASE + lmr); - /* ok, we're done, return SDRAM size */ - return ((0x400000 << sdram_table[i].sz)); /* log2 value of 4MByte */ + /* ok, we're done, set SDRAM size to log2 value of 4MByte*/ + gd->ram_size = 0x400000 << sdram_table[i].sz; + + return 0; } diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 07b30ed293a8605ae24edf607310bfbb1f363e0e..c07d8f88b9a14a8369fdef44314a127599539e03 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -612,7 +612,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -phys_size_t initdram(void) +int initdram(void) { unsigned long bank_reg[4], tmp, bank_size; int i, ds; @@ -648,7 +648,9 @@ phys_size_t initdram(void) (void) get_clocks(); if (gd->cpu_clk > 220000000) TotalSize /= 2; - return (TotalSize * 1024 * 1024); + gd->ram_size = TotalSize * 1024 * 1024; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/munices/munices.c b/board/munices/munices.c index b88160c8a84449800c4bcab73b70f2d83c53bc95..8f1a5a83411ce251e20d9e7f73deada20cc9e4dc 100644 --- a/board/munices/munices.c +++ b/board/munices/munices.c @@ -11,6 +11,8 @@ #include "mt48lc16m16a2-75.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { @@ -58,7 +60,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -125,7 +127,9 @@ phys_size_t initdram(void) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard (void) diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c index baa5723f4abcf3ce841fa135b4fa29ef5cd4fa5e..e473531fd3c25e55bed252f2c72c48b18222f4d9 100644 --- a/board/pb1x00/pb1x00.c +++ b/board/pb1x00/pb1x00.c @@ -11,11 +11,15 @@ #include <asm/mipsregs.h> #include <asm/io.h> -phys_size_t initdram(void) +DECLARE_GLOBAL_DATA_PTR; + +int initdram(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return 64*1024*1024; + gd->ram_size = 64 * 1024 * 1024; + + return 0; } #define BCSR_PCMCIA_PC0DRVEN 0x0010 diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c index ef19daf3c953de29d290218be5370eb2863ecefc..c833aec9b26fe783f1c0e601c38692e734ff6f9c 100644 --- a/board/pdm360ng/pdm360ng.c +++ b/board/pdm360ng/pdm360ng.c @@ -48,7 +48,7 @@ sdram_conf_t mddrc_config[] = { }, }; -phys_size_t initdram(void) +int initdram(void) { int i; u32 msize = 0; @@ -95,7 +95,9 @@ phys_size_t initdram(void) break; } - return msize; + gd->ram_size = msize; + + return 0; } static int set_lcd_brightness(char *); diff --git a/board/phytec/pcm030/pcm030.c b/board/phytec/pcm030/pcm030.c index 470bd7079261f594d125470150fc66d534d3c925..19d87169ee56236fb8bfbb4cfb8e4e1a1e22b8c9 100644 --- a/board/phytec/pcm030/pcm030.c +++ b/board/phytec/pcm030/pcm030.c @@ -18,6 +18,8 @@ #include "mt46v32m16-75.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_RAMBOOT static void sdram_start(int hi_addr) { @@ -73,7 +75,7 @@ static void sdram_start(int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { volatile struct mpc5xxx_mmap_ctl *mm = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; @@ -143,7 +145,9 @@ phys_size_t initdram(void) #endif /* CONFIG_SYS_RAMBOOT */ - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } int checkboard(void) diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c index 3cdc91cf4338cd49d8f26c479388f914ee2553a9..2638ea67d3b0a177b8427549242f09fe72c35aa3 100644 --- a/board/qemu-mips/qemu-mips.c +++ b/board/qemu-mips/qemu-mips.c @@ -11,11 +11,15 @@ #include <asm/io.h> #include <netdev.h> -phys_size_t initdram(void) +DECLARE_GLOBAL_DATA_PTR; + +int initdram(void) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ - return MEM_SIZE*1024*1024; + gd->ram_size = MEM_SIZE * 1024 * 1024; + + return 0; } int checkboard(void) diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index b20de4c3c3da51a5a3f18001db86c3e7a7238dd1..f01cd7ed52190f2bce9268aabc366e17e141475a 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -19,6 +19,8 @@ #include <libfdt.h> #endif +DECLARE_GLOBAL_DATA_PTR; + int fixed_sdram(void); void sdram_init(void); @@ -35,7 +37,7 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; u32 msize = 0; @@ -61,8 +63,10 @@ phys_size_t initdram(void) */ ddr_enable_ecc(msize * 1024 * 1024); #endif - /* return total bus SDRAM size(bytes) -- DDR */ - return (msize * 1024 * 1024); + /* set total bus SDRAM size(bytes) -- DDR */ + gd->ram_size = msize * 1024 * 1024; + + return 0; } #if !defined(CONFIG_SPD_EEPROM) diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index a541d25cc384491c367c21d9523927680e1bd8a7..44842d5af19a244b73bbc70350fb9f36401af81d 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -23,6 +23,8 @@ #include <libfdt.h> #include <fdt_support.h> +DECLARE_GLOBAL_DATA_PTR; + long int fixed_sdram (void); int board_early_init_f (void) @@ -37,7 +39,7 @@ int checkboard (void) return 0; } -phys_size_t initdram(void) +int initdram(void) { long dram_size = 0; @@ -48,7 +50,9 @@ phys_size_t initdram(void) #endif debug (" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } #if defined(CONFIG_SYS_DRAM_TEST) diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c index b7f6380bec501b56ee999c6edcc03323ca4f9862..e2b9123bac5e4cfae06ec7e4a4e4fa9c57a8e564 100644 --- a/board/sysam/amcore/amcore.c +++ b/board/sysam/amcore/amcore.c @@ -14,6 +14,8 @@ #include <dm.h> #include <dm/platform_data/serial_coldfire.h> +DECLARE_GLOBAL_DATA_PTR; + void init_lcd(void) { /* setup for possible K0108 lcd connected on the parallel port */ @@ -49,7 +51,7 @@ void fudelay(int usec) asm volatile ("nop"); } -phys_size_t initdram(void) +int initdram(void) { u32 dramsize, RC; @@ -99,7 +101,10 @@ phys_size_t initdram(void) out_be32(&dc->dacr0, 0x0000b344); out_be32((u32 *)0x00000c00, 0xbeaddeed); - return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + + return 0; } static struct coldfire_serial_platdata mcf5307_serial_plat = { diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index 1e843d5b03be86da9e596839ac493bd282daf434..baf32087400b88ee6e623a0c603282507b1b8fa4 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -133,7 +133,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -252,10 +252,12 @@ phys_size_t initdram(void) } #if defined(CONFIG_TQM5200_B) - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; #else - return dramsize; + gd->ram_size = dramsize; #endif /* CONFIG_TQM5200_B */ + + return 0; } int checkboard (void) diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index a05ae2a170e002f1f20cc3fe8be1c6241cd5873e..0968e494a533e697bce21657777d5aec2ddeb0ad 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -66,7 +66,7 @@ int board_early_init_r (void) { /************************************************************************** * DRAM initalization and size detection */ -phys_size_t initdram(void) +int initdram(void) { long bank_size; long size; @@ -112,7 +112,9 @@ phys_size_t initdram(void) if(size < DDR_MAX_SIZE_PER_CS) break; } - return size; + gd->ram_size = size; + + return 0; } /************************************************************************** diff --git a/board/tqc/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index 99357302f62f90af1c21cd0a0ace5ec46a007f4c..489a22c1614fdebbb41313257674c1dc1f13815b 100644 --- a/board/tqc/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -126,7 +126,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; @@ -390,7 +390,9 @@ phys_size_t initdram(void) memctl->memc_or5 = CONFIG_SYS_OR5_ISP1362; memctl->memc_br5 = CONFIG_SYS_BR5_ISP1362; #endif /* CONFIG_ISP1362_USB */ - return (size_b0 + size_b1); + gd->ram_size = size_b0 + size_b1; + + return 0; } /* ------------------------------------------------------------------------- */ diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c index 20490a31570efa9aa97228134cb7ea4b4161a633..c271fb587344737129c0da942a71d4216a2d879b 100644 --- a/board/v38b/v38b.c +++ b/board/v38b/v38b.c @@ -13,6 +13,7 @@ #include <net.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_RAMBOOT static void sdram_start(int hi_addr) @@ -56,7 +57,7 @@ static void sdram_start(int hi_addr) #endif /* !CONFIG_SYS_RAMBOOT */ -phys_size_t initdram(void) +int initdram(void) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -166,7 +167,9 @@ phys_size_t initdram(void) __asm__ volatile ("sync"); } - return dramsize + dramsize2; + gd->ram_size = dramsize + dramsize2; + + return 0; } diff --git a/board/varisys/cyrus/ddr.c b/board/varisys/cyrus/ddr.c index da6f5ad253007dbe413138ff54db7ef35e7e0a27..abf4e932652320c765dbd69529528b5512d88d44 100644 --- a/board/varisys/cyrus/ddr.c +++ b/board/varisys/cyrus/ddr.c @@ -168,7 +168,7 @@ found: popts->ddr_cdr1 = DDR_CDR1_DHC_EN; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size; @@ -184,5 +184,7 @@ phys_size_t initdram(void) dram_size *= 0x100000; debug(" DDR: "); - return dram_size; + gd->ram_size = dram_size; + + return 0; } diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c index 5349a583fc9a8eff057b02c2f7ef37cd79c181eb..37441c7a468c8fb198bc5fcfcc6e7b0564bf153d 100644 --- a/board/ve8313/ve8313.c +++ b/board/ve8313/ve8313.c @@ -88,7 +88,7 @@ static long fixed_sdram(void) return msize; } -phys_size_t initdram(void) +int initdram(void) { volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; volatile fsl_lbc_t *lbc = &im->im_lbc; @@ -106,7 +106,9 @@ phys_size_t initdram(void) sync(); /* return total bus SDRAM size(bytes) -- DDR */ - return msize; + gd->ram_size = msize; + + return 0; } #define VE8313_WDT_EN 0x00020000 diff --git a/board/xes/xpedite1000/xpedite1000.c b/board/xes/xpedite1000/xpedite1000.c index ff64483cf4f54222bf9fe15fa2e0f3b7d04f2553..df5a7a0539f2975548265f40cf0376366d87876e 100644 --- a/board/xes/xpedite1000/xpedite1000.c +++ b/board/xes/xpedite1000/xpedite1000.c @@ -116,9 +116,11 @@ int checkboard(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } /* diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c index 9ec99a1e28f565f54071fb7186397224566f84e5..e436c28f785771c0471a50fb271ed68ea3e68e9e 100644 --- a/board/xes/xpedite517x/xpedite517x.c +++ b/board/xes/xpedite517x/xpedite517x.c @@ -13,6 +13,8 @@ #include <pca953x.h> #include "../common/fsl_8xxx_misc.h" +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI) extern void ft_board_pci_setup(void *blob, bd_t *bd); #endif @@ -56,7 +58,7 @@ int board_early_init_r(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { phys_size_t dram_size = fsl_ddr_sdram(); @@ -65,7 +67,9 @@ phys_size_t initdram(void) ddr_enable_ecc(dram_size); #endif - return dram_size; + gd->ram_size = dram_size; + + return 0; } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c index dfdd3f23103a4617ee44428f1f73832dd2255534..6148a4b69c11c509955ee970b47adf2254052195 100644 --- a/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c +++ b/board/xilinx/ppc405-generic/xilinx_ppc405_generic.c @@ -10,6 +10,8 @@ #include <common.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + ulong get_PCI_freq(void) { return 0; @@ -21,10 +23,12 @@ int checkboard(void) return 0; } -phys_size_t initdram(void) +int initdram(void) { - return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, + gd->ram_size = get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024); + + return 0; } void get_sys_info(sys_info_t *sys_info) diff --git a/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c b/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c index 67fd66815737c5e8bded44b3b7a5018c22b87073..d7e6aee706de5a8d4327be80a76f71b12b055742 100644 --- a/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c +++ b/board/xilinx/ppc440-generic/xilinx_ppc440_generic.c @@ -11,16 +11,20 @@ #include <netdev.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { puts("Xilinx PPC440 Generic Board\n"); return 0; } -phys_size_t initdram(void) +int initdram(void) { - return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, + gd->ram_size = get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024); + + return 0; } void get_sys_info(sys_info_t *sys_info) diff --git a/common/board_f.c b/common/board_f.c index 106fd347219e1502a6acb1342ffcc129ba697809..def5752bd4f2bd3e5085289e83b5e56ae1d96843 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -180,13 +180,7 @@ static int announce_dram_init(void) #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) static int init_func_ram(void) { - gd->ram_size = initdram(); - - if (gd->ram_size > 0) - return 0; - - puts("*** failed ***\n"); - return 1; + return initdram(); } #endif diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 159c22e18afcf598d9b8d5cd4d338d6439d8bda5..9aa3eecd34fc03e7844bb709da9bf4b14e6362d6 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -15,6 +15,8 @@ #include <fsl_ddr_sdram.h> #include <fsl_ddr.h> +DECLARE_GLOBAL_DATA_PTR; + /* * CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY is the physical address from the view * of DDR controllers. It is the same as CONFIG_SYS_DDR_SDRAM_BASE for diff --git a/include/common.h b/include/common.h index bbdb943cf01951e242fea783417adef38b8c7ebd..dd8b25f421e8d410e19b636c99856f3e8923e29d 100644 --- a/include/common.h +++ b/include/common.h @@ -209,7 +209,7 @@ int timer_init(void); int cpu_init(void); /* */ -phys_size_t initdram(void); +int initdram(void); #include <display_options.h>