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Forked from Reform / reform-boundary-uboot
21095 commits behind the upstream repository.
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Peng Fan authored
i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.

Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
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Kconfig
Makefile
clock.c
ddr.c
hab.c
mp.c
soc.c