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reform-boundary-uboot

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    Vitaly Andrianov authored
    This patch adds the DDR3 ECC support to enable ECC in the DDR3
    EMIF controller for Keystone II devices.
    
    By default, ECC will only be enabled if RMW is supported in the
    DDR EMIF controller. The entire DDR memory will be scrubbed to
    zero using an EDMA channel after ECC is enabled and before
    u-boot is re-located to DDR memory.
    
    An ecc_test environment variable is added for ECC testing.
    If ecc_test is set to 0, a detection of 2-bit error will reset
    the device, if ecc_test is set to 1, 2-bit error detection
    will not reset the device, user can still boot the kernel to
    check the ECC error handling in kernel.
    
    Signed-off-by: default avatarHao Zhang <hzhang@ti.com>
    Signed-off-by: default avatarVitaly Andrianov <vitalya@ti.com>
    Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
    89f44bb0
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