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fsl

Forked from Reform / reform-boundary-uboot

17813 commits behind the upstream repository.

driver/ddr/fsl: Update DDR4 RTT values

York Sun authored 9 years ago

DDR4 has different RTT value and code according to JEDEC spec. Update
the macros and options .

Signed-off-by: York Sun <yorksun@freescale.com>

19601dd9

19601dd9 9 years ago

Name	Last commit	Last update
..
Makefile
arm_ddr_gen3.c
ctrl_regs.c
ddr1_dimm_params.c
ddr2_dimm_params.c
ddr3_dimm_params.c
ddr4_dimm_params.c
fsl_ddr_gen4.c
interactive.c
lc_common_dimm_params.c
main.c
mpc85xx_ddr_gen1.c
mpc85xx_ddr_gen2.c
mpc85xx_ddr_gen3.c
mpc86xx_ddr.c
options.c
util.c