From f69766e4b5d47ecd3aa58677a8da875694f364f2 Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Wed, 30 Jan 2008 14:55:14 -0600
Subject: [PATCH] 85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.
For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
board/atum8548/tlb.c | 2 +-
board/freescale/mpc8540ads/tlb.c | 2 +-
board/freescale/mpc8541cds/tlb.c | 2 +-
board/freescale/mpc8544ds/tlb.c | 2 +-
board/freescale/mpc8548cds/tlb.c | 2 +-
board/freescale/mpc8555cds/tlb.c | 2 +-
board/freescale/mpc8560ads/tlb.c | 2 +-
board/freescale/mpc8568mds/tlb.c | 2 +-
board/mpc8540eval/tlb.c | 2 +-
board/pm854/tlb.c | 2 +-
board/pm856/tlb.c | 2 +-
board/sbc8548/tlb.c | 2 +-
board/sbc8560/tlb.c | 2 +-
board/stxgp3/tlb.c | 2 +-
board/stxssa/tlb.c | 2 +-
board/tqm85xx/tlb.c | 2 +-
cpu/mpc85xx/cpu_init.c | 6 +++---
include/configs/ATUM8548.h | 1 +
include/configs/MPC8540ADS.h | 1 +
include/configs/MPC8540EVAL.h | 1 +
include/configs/MPC8541CDS.h | 1 +
include/configs/MPC8544DS.h | 1 +
include/configs/MPC8548CDS.h | 1 +
include/configs/MPC8555CDS.h | 1 +
include/configs/MPC8560ADS.h | 1 +
include/configs/MPC8568MDS.h | 1 +
include/configs/PM854.h | 1 +
include/configs/PM856.h | 1 +
include/configs/SBC8540.h | 1 +
include/configs/TQM85xx.h | 1 +
include/configs/sbc8548.h | 1 +
include/configs/sbc8560.h | 1 +
include/configs/stxgp3.h | 1 +
include/configs/stxssa.h | 1 +
34 files changed, 36 insertions(+), 19 deletions(-)
diff --git a/board/atum8548/tlb.c b/board/atum8548/tlb.c
index bb6ce761ac5..1ef4de41efb 100644
--- a/board/atum8548/tlb.c
+++ b/board/atum8548/tlb.c
@@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe210_0000 1M PCI2 IO
* 0xe300_0000 1M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
};
diff --git a/board/freescale/mpc8540ads/tlb.c b/board/freescale/mpc8540ads/tlb.c
index 3eaff013f61..4fe2862f7d5 100644
--- a/board/freescale/mpc8540ads/tlb.c
+++ b/board/freescale/mpc8540ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8541cds/tlb.c b/board/freescale/mpc8541cds/tlb.c
index 92f759b31ba..c5434a069f9 100644
--- a/board/freescale/mpc8541cds/tlb.c
+++ b/board/freescale/mpc8541cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8544ds/tlb.c b/board/freescale/mpc8544ds/tlb.c
index 34cfb38f0d6..61fc60986c4 100644
--- a/board/freescale/mpc8544ds/tlb.c
+++ b/board/freescale/mpc8544ds/tlb.c
@@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe100_0000 255M PCI IO range
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c
index b21f71bd12b..ab99af7e1c3 100644
--- a/board/freescale/mpc8548cds/tlb.c
+++ b/board/freescale/mpc8548cds/tlb.c
@@ -80,7 +80,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe210_0000 1M PCI2 IO
* 0xe300_0000 1M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8555cds/tlb.c b/board/freescale/mpc8555cds/tlb.c
index 92f759b31ba..c5434a069f9 100644
--- a/board/freescale/mpc8555cds/tlb.c
+++ b/board/freescale/mpc8555cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8560ads/tlb.c b/board/freescale/mpc8560ads/tlb.c
index 3eaff013f61..4fe2862f7d5 100644
--- a/board/freescale/mpc8560ads/tlb.c
+++ b/board/freescale/mpc8560ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c
index 225fc9465e1..a866c526c8d 100644
--- a/board/freescale/mpc8568mds/tlb.c
+++ b/board/freescale/mpc8568mds/tlb.c
@@ -74,7 +74,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 8M PCI1 IO
* 0xe280_0000 8M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 3, BOOKE_PAGESZ_64M, 1),
diff --git a/board/mpc8540eval/tlb.c b/board/mpc8540eval/tlb.c
index f04123636d8..1003bf61341 100644
--- a/board/mpc8540eval/tlb.c
+++ b/board/mpc8540eval/tlb.c
@@ -27,7 +27,7 @@
#include <asm/mmu.h>
struct fsl_e_tlb_entry tlb_table[] = {
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
diff --git a/board/pm854/tlb.c b/board/pm854/tlb.c
index 5d8753798f2..a7f3813501a 100644
--- a/board/pm854/tlb.c
+++ b/board/pm854/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/pm856/tlb.c b/board/pm856/tlb.c
index 5d8753798f2..a7f3813501a 100644
--- a/board/pm856/tlb.c
+++ b/board/pm856/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index 8d6625e54e2..6314005ca86 100644
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -81,7 +81,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe0000000 1M CCSRBAR
* 0xe2000000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
diff --git a/board/sbc8560/tlb.c b/board/sbc8560/tlb.c
index 155ff64bbba..d073399606c 100644
--- a/board/sbc8560/tlb.c
+++ b/board/sbc8560/tlb.c
@@ -28,7 +28,7 @@
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB for CCSRBAR (IMMR) */
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
diff --git a/board/stxgp3/tlb.c b/board/stxgp3/tlb.c
index 529f230428e..d4104166a04 100644
--- a/board/stxgp3/tlb.c
+++ b/board/stxgp3/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/stxssa/tlb.c b/board/stxssa/tlb.c
index 46b14406d84..86cbd112791 100644
--- a/board/stxssa/tlb.c
+++ b/board/stxssa/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/tqm85xx/tlb.c b/board/tqm85xx/tlb.c
index a178cfef30f..ad26caeea2a 100644
--- a/board/tqm85xx/tlb.c
+++ b/board/tqm85xx/tlb.c
@@ -91,7 +91,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_64M, 1),
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index c0ff1d5120d..5f02e0e21bb 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -127,12 +127,12 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
/* We run cpu_init_early_f in AS = 1 */
void cpu_init_early_f(void)
{
- set_tlb(0, CFG_CCSRBAR, CFG_CCSRBAR,
+ set_tlb(0, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
1, 0, BOOKE_PAGESZ_4K, 0);
/* set up CCSR if we want it moved */
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
+#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR_PHYS)
{
u32 temp;
@@ -141,7 +141,7 @@ void cpu_init_early_f(void)
1, 1, BOOKE_PAGESZ_4K, 0);
temp = in_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT);
- out_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT, CFG_CCSRBAR >> 12);
+ out_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT, CFG_CCSRBAR_PHYS >> 12);
temp = in_be32((volatile u32 *)CFG_CCSRBAR);
}
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index c14376e7f49..0d644da7ae6 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -96,6 +96,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define PCI_SPEED 33333000 /* CPLD currenlty does not have PCI setup info */
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 5ea7b250471..85934d718df 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -100,6 +100,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 174215c2cc0..77eea737874 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -83,6 +83,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 7334088b18f..f1a86e69104 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -82,6 +82,7 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
/*
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index a8942095c95..c83d9e25d90 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -98,6 +98,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index a3db9f44571..2d44df4546b 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -96,6 +96,7 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 93877aedb04..fa0f7b354d7 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -82,6 +82,7 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
/*
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 08884b36f07..e30302c5d43 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -95,6 +95,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index a12d193c712..7bb20e58cae 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -90,6 +90,7 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index 819bee70a1a..bd058fc1551 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -92,6 +92,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index 8902f42ff15..38a26dc8aa6 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -94,6 +94,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 2bbfe9aa62b..946b3c2d8ab 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -99,6 +99,7 @@
#else
#define CFG_CCSRBAR 0xff700000 /* default CCSRBAR */
#endif
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 21e8bafc2c3..fca5f74df79 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -89,6 +89,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xFF700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xE0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
/*
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 516203a5d81..49a72347fb7 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -87,6 +87,7 @@
*/
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index f9ede5f1879..81a1e072c6d 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -93,6 +93,7 @@
#else
#define CFG_CCSRBAR 0xff700000 /* default CCSRBAR */
#endif
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 047e1cf99a3..fc5d0cc76a3 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -114,6 +114,7 @@
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
#define CFG_CCSRBAR 0xfdf00000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index e09dd7163f7..15f690af169 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -127,6 +127,7 @@
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
--
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