diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c
index 2521589c07e9cf0c07a2f59990a521aafcfea7c8..05f4099aaee81712eb21d130aa0044f6fa2e37d2 100644
--- a/arch/arm/cpu/armv7/zynq/slcr.c
+++ b/arch/arm/cpu/armv7/zynq/slcr.c
@@ -129,11 +129,18 @@ out:
 
 void zynq_slcr_devcfg_disable(void)
 {
+	u32 reg_val;
+
 	zynq_slcr_unlock();
 
 	/* Disable AXI interface by asserting FPGA resets */
 	writel(0xF, &slcr_base->fpga_rst_ctrl);
 
+	/* Disable Level shifters before setting PS-PL */
+	reg_val = readl(&slcr_base->lvl_shftr_en);
+	reg_val &= ~0xF;
+	writel(reg_val, &slcr_base->lvl_shftr_en);
+
 	/* Set Level Shifters DT618760 */
 	writel(0xA, &slcr_base->lvl_shftr_en);