diff --git a/drivers/phy/marvell/comphy.h b/drivers/phy/marvell/comphy.h
index df5b7d507ecf75270ab5e03ee1dcd9e7cca2b45d..0a156925794b38039cde62955b8d9d695dd1e0ee 100644
--- a/drivers/phy/marvell/comphy.h
+++ b/drivers/phy/marvell/comphy.h
@@ -69,7 +69,7 @@
 	(0x3 << DFX_DEV_GEN_PCIE_CLK_SRC_OFFSET)
 
 #define MAX_LANE_OPTIONS			10
-#define MAX_UTMI_PHY_COUNT			2
+#define MAX_UTMI_PHY_COUNT			3
 
 struct comphy_mux_options {
 	u32 type;
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index 651397d8161d0ea4fc5f40db9702c0e057779678..bc2508bb7e0372137ee7b861e00189c08f4ef27a 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -112,6 +112,7 @@ static int comphy_probe(struct udevice *dev)
 	struct comphy_map comphy_map_data[MAX_LANE_OPTIONS];
 	int subnode;
 	int lane;
+	int last_idx = 0;
 
 	/* Save base addresses for later use */
 	chip_cfg->comphy_base_addr = (void *)dev_get_addr_index(dev, 0);
@@ -178,10 +179,20 @@ static int comphy_probe(struct udevice *dev)
 	/* PHY power UP sequence */
 	chip_cfg->ptr_comphy_chip_init(chip_cfg, comphy_map_data);
 	/* PHY print SerDes status */
+	if (of_machine_is_compatible("marvell,armada8040"))
+		printf("Comphy chip #%d:\n", chip_cfg->comphy_index);
 	comphy_print(chip_cfg, comphy_map_data);
 
-	/* Initialize dedicated PHYs (not muxed SerDes lanes) */
-	comphy_dedicated_phys_init();
+	/*
+	 * Only run the dedicated PHY init code once, in the last PHY init call
+	 */
+	if (of_machine_is_compatible("marvell,armada8040"))
+		last_idx = 1;
+
+	if (chip_cfg->comphy_index == last_idx) {
+		/* Initialize dedicated PHYs (not muxed SerDes lanes) */
+		comphy_dedicated_phys_init();
+	}
 
 	return 0;
 }