diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 3251905f562178230345799175f3f534e0fe4644..c3a37600d323bceb033e09c25b913cb5ba6dcb5e 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -303,6 +303,7 @@ #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 #define CONFIG_SYS_FSL_NUM_LAWS 32 @@ -336,6 +337,7 @@ #elif defined(CONFIG_PPC_P3041) #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 #define CONFIG_SYS_FSL_NUM_LAWS 32 @@ -369,6 +371,7 @@ #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 8 #define CONFIG_SYS_FSL_NUM_CC_PLLS 4 #define CONFIG_SYS_FSL_NUM_LAWS 32 @@ -414,6 +417,7 @@ #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ #define CONFIG_SYS_PPC64 /* 64-bit core */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 #define CONFIG_SYS_FSL_NUM_LAWS 32 @@ -444,6 +448,7 @@ #elif defined(CONFIG_PPC_P5040) #define CONFIG_SYS_PPC64 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 #define CONFIG_SYS_FSL_NUM_LAWS 32 diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 09043435b433d9a97fa55c7d6fcb4742a9bdd6ce..0f40179aca9d27bb215d14a13a874c8cdec3a668 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -33,7 +33,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 9814ca2012f5946641046422152074fe27af4f0b..905bacfa969d367e0da30f5894edf8267c2480f2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -37,7 +37,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c0591c52770d9083b4291bfccea69271bbcb3649..c3fb80c8d056b174dd271b7f1406004ce5909f3d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -42,7 +42,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 1ed53dbbb1ee5a38283cf86b0f0712297844c1cf..a397238e1aaec1b9632780ec9914a09afd418f3a 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -34,7 +34,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE