diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig
index 4a7d82f74c14492ccabd20ce10408a445f18810c..37b89b00131ecb396ddb849e73df2dfe7593f919 100644
--- a/arch/arm/cpu/armv7/exynos/Kconfig
+++ b/arch/arm/cpu/armv7/exynos/Kconfig
@@ -51,6 +51,12 @@ config TARGET_SNOW
 	select OF_CONTROL
 	select SPL_DISABLE_OF_CONTROL
 
+config TARGET_SPRING
+	bool "Spring board"
+	select SUPPORT_SPL
+	select OF_CONTROL
+	select SPL_DISABLE_OF_CONTROL
+
 config TARGET_SMDK5420
 	bool "SMDK5420 board"
 	select SUPPORT_SPL
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ba6355379cba8421a5de090ece9b13ea03b88a0d..2df957cf56aa51f992a261457c1ebd1c6018c4fa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -9,6 +9,7 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 	exynos5250-snow.dtb \
+	exynos5250-spring.dtb \
 	exynos5250-smdk5250.dtb \
 	exynos5420-smdk5420.dtb \
 	exynos5420-peach-pit.dtb \
diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts
new file mode 100644
index 0000000000000000000000000000000000000000..76d5323dc314ab7aedbcd910995fdb09f9aa1345
--- /dev/null
+++ b/arch/arm/dts/exynos5250-spring.dts
@@ -0,0 +1,588 @@
+/*
+ * Google Spring board device tree source
+ *
+ * Copyright (c) 2013 Google, Inc
+ * Copyright (c) 2014 SUSE LINUX Products GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/input/input.h>
+#include "exynos5250.dtsi"
+
+/ {
+	model = "Google Spring";
+	compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
+
+	aliases {
+		i2c0 = "/i2c@12C60000";
+		i2c1 = "/i2c@12C70000";
+		i2c2 = "/i2c@12C80000";
+		i2c3 = "/i2c@12C90000";
+		i2c4 = "/i2c@12CA0000";
+		i2c5 = "/i2c@12CB0000";
+		i2c6 = "/i2c@12CC0000";
+		i2c7 = "/i2c@12CD0000";
+		i2c104 = &cros_ec_ldo_tunnel;
+		spi0 = "/spi@12d20000";
+		spi1 = "/spi@12d30000";
+		spi2 = "/spi@12d40000";
+		spi3 = "/spi@131a0000";
+		spi4 = "/spi@131b0000";
+		mmc0 = "/mmc@12000000";
+		serial0 = "/serial@12C30000";
+		console = "/serial@12C30000";
+		i2s = "/sound@3830000";
+	};
+
+	memory {
+		reg = <0x40000000 0x80000000>;
+	};
+
+	flash@0 {
+		spl { /* spl size override */
+			size = <0x8000>;
+		};
+	};
+
+	chosen {
+		bootargs = "console=tty1";
+		stdout-path = "serial3:115200n8";
+	};
+
+	board-rev {
+		compatible = "google,board-revision";
+		google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
+					 <&gpy4 2 0>;
+	};
+
+	mmc@12200000 {
+		samsung,bus-width = <8>;
+		samsung,timing = <1 3 3>;
+		samsung,removable = <0>;
+	};
+
+	mmc@12210000 {
+		status = "disabled";
+	};
+
+	mmc@12220000 {
+		/* MMC2 pins are used as GPIO for eDP bridge */
+		status = "disabled";
+	};
+
+	mmc@12230000 {
+		status = "disabled";
+	};
+
+	ehci@12110000 {
+		samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	xhci@12000000 {
+		samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
+	};
+
+	spi@12d30000 {
+		spi-max-frequency = <50000000>;
+		firmware_storage_spi: flash@0 {
+			compatible = "spi-flash";
+			reg = <0>;
+		};
+	};
+
+	tmu@10060000 {
+		samsung,min-temp	= <25>;
+		samsung,max-temp	= <125>;
+		samsung,start-warning	= <95>;
+		samsung,start-tripping	= <105>;
+		samsung,hw-tripping	= <110>;
+		samsung,efuse-min-value	= <40>;
+		samsung,efuse-value	= <55>;
+		samsung,efuse-max-value	= <100>;
+		samsung,slope		= <274761730>;
+		samsung,dc-value	= <25>;
+	};
+
+	fimd@14400000 {
+		samsung,vl-freq = <60>;
+		samsung,vl-col = <1366>;
+		samsung,vl-row = <768>;
+		samsung,vl-width = <1366>;
+		samsung,vl-height = <768>;
+
+		samsung,vl-clkp;
+		samsung,vl-dp;
+		samsung,vl-hsp;
+		samsung,vl-vsp;
+
+		samsung,vl-bpix = <4>;
+
+		samsung,vl-hspw = <32>;
+		samsung,vl-hbpd = <80>;
+		samsung,vl-hfpd = <48>;
+		samsung,vl-vspw = <5>;
+		samsung,vl-vbpd = <14>;
+		samsung,vl-vfpd = <3>;
+		samsung,vl-cmd-allow-len = <0xf>;
+
+		samsung,winid = <0>;
+		samsung,interface-mode = <1>;
+		samsung,dp-enabled = <1>;
+		samsung,dual-lcd-enabled = <0>;
+	};
+
+	dp@145b0000 {
+		samsung,lt-status = <0>;
+
+		samsung,master-mode = <0>;
+		samsung,bist-mode = <0>;
+		samsung,bist-pattern = <0>;
+		samsung,h-sync-polarity = <0>;
+		samsung,v-sync-polarity = <0>;
+		samsung,interlaced = <0>;
+		samsung,color-space = <0>;
+		samsung,dynamic-range = <0>;
+		samsung,ycbcr-coeff = <0>;
+		samsung,color-depth = <1>;
+	};
+};
+
+&i2c_0 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <378000>;
+
+	s5m8767-pmic@66 {
+		compatible = "samsung,s5m8767-pmic";
+		reg = <0x66>;
+		interrupt-parent = <&gpx3>;
+		wakeup-source;
+
+		s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
+		                              <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
+		                              <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
+
+		s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
+		                             <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
+		                             <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
+
+		/*
+		 * The following arrays of DVS voltages are not used, since we are
+		 * not using GPIOs to control PMIC bucks, but they must be defined
+		 * to please the driver.
+		 */
+		s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
+		                                 <1250000>, <1200000>,
+		                                 <1150000>, <1100000>,
+		                                 <1000000>, <950000>;
+
+		s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
+		                                 <1100000>, <1100000>,
+		                                 <1000000>, <1000000>,
+		                                 <1000000>, <1000000>;
+
+		s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
+		                                 <1200000>, <1200000>,
+		                                 <1200000>, <1200000>,
+		                                 <1200000>, <1200000>;
+
+		clocks {
+			compatible = "samsung,s5m8767-clk";
+			#clock-cells = <1>;
+			clock-output-names = "en32khz_ap",
+			                     "en32khz_cp",
+			                     "en32khz_bt";
+		};
+
+		regulators {
+			ldo4_reg: LDO4 {
+				regulator-name = "P1.0V_LDO_OUT4";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <0>;
+			};
+
+			ldo5_reg: LDO5 {
+				regulator-name = "P1.8V_LDO_OUT5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <0>;
+			};
+
+			ldo6_reg: LDO6 {
+				regulator-name = "vdd_mydp";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo7_reg: LDO7 {
+				regulator-name = "P1.1V_LDO_OUT7";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo8_reg: LDO8 {
+				regulator-name = "P1.0V_LDO_OUT8";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo10_reg: LDO10 {
+				regulator-name = "P1.8V_LDO_OUT10";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo11_reg: LDO11 {
+				regulator-name = "P1.8V_LDO_OUT11";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <0>;
+			};
+
+			ldo12_reg: LDO12 {
+				regulator-name = "P3.0V_LDO_OUT12";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo13_reg: LDO13 {
+				regulator-name = "P1.8V_LDO_OUT13";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <0>;
+			};
+
+			ldo14_reg: LDO14 {
+				regulator-name = "P1.8V_LDO_OUT14";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo15_reg: LDO15 {
+				regulator-name = "P1.0V_LDO_OUT15";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo16_reg: LDO16 {
+				regulator-name = "P1.8V_LDO_OUT16";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <3>;
+			};
+
+			ldo17_reg: LDO17 {
+				regulator-name = "P1.2V_LDO_OUT17";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+				op_mode = <0>;
+			};
+
+			ldo25_reg: LDO25 {
+				regulator-name = "vdd_bridge";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+				op_mode = <1>;
+			};
+
+			buck1_reg: BUCK1 {
+				regulator-name = "vdd_mif";
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <3>;
+			};
+
+			buck2_reg: BUCK2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <3>;
+			};
+
+			buck3_reg: BUCK3 {
+				regulator-name = "vdd_int";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <3>;
+			};
+
+			buck4_reg: BUCK4 {
+				regulator-name = "vdd_g3d";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				op_mode = <3>;
+			};
+
+			buck5_reg: BUCK5 {
+				regulator-name = "P1.8V_BUCK_OUT5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>;
+			};
+
+			buck6_reg: BUCK6 {
+				regulator-name = "P1.2V_BUCK_OUT6";
+				regulator-min-microvolt = <2050000>;
+				regulator-max-microvolt = <2050000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <0>;
+			};
+
+			buck9_reg: BUCK9 {
+				regulator-name = "vdd_ummc";
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <3>;
+			};
+		};
+	};
+};
+
+&i2c_1 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <378000>;
+};
+
+&i2c_2 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <66000>;
+};
+
+&i2c_3 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <66000>;
+};
+
+&i2c_4 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <66000>;
+	clock-frequency = <66000>;
+
+	cros_ec: embedded-controller {
+		compatible = "google,cros-ec-i2c";
+		reg = <0x1e>;
+		interrupts = <6 IRQ_TYPE_NONE>;
+		interrupt-parent = <&gpx1>;
+		wakeup-source;
+		u-boot,i2c-offset-len = <0>;
+		ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
+		cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
+			compatible = "google,cros-ec-ldo-tunnel";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			power-regulator {
+				compatible = "ti,tps65090";
+				reg = <0x48>;
+
+				regulators {
+					dcdc1 {
+						ti,enable-ext-control;
+					};
+					dcdc2 {
+						ti,enable-ext-control;
+					};
+					dcdc3 {
+						ti,enable-ext-control;
+					};
+					fet1: fet1 {
+						regulator-name = "vcd_led";
+						ti,overcurrent-wait = <3>;
+					};
+					tps65090_fet2: fet2 {
+						regulator-name = "video_mid";
+						regulator-always-on;
+						ti,overcurrent-wait = <3>;
+					};
+					fet3 {
+						regulator-name = "wwan_r";
+						regulator-always-on;
+						ti,overcurrent-wait = <3>;
+					};
+					fet4 {
+						regulator-name = "sdcard";
+						ti,overcurrent-wait = <3>;
+					};
+					fet5 {
+						regulator-name = "camout";
+						regulator-always-on;
+						ti,overcurrent-wait = <3>;
+					};
+					fet6: fet6 {
+						regulator-name = "lcd_vdd";
+						ti,overcurrent-wait = <3>;
+					};
+					tps65090_fet7: fet7 {
+						regulator-name = "video_mid_1a";
+						regulator-always-on;
+						ti,overcurrent-wait = <3>;
+					};
+					ldo1 {
+					};
+					ldo2 {
+					};
+				};
+			};
+		};
+	};
+};
+
+&i2c_5 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <66000>;
+};
+
+&i2c_7 {
+	status = "okay";
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <66000>;
+
+	ps8622-bridge@8 {
+		compatible = "parade,ps8622";
+		reg = <0x8>;
+		sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
+		hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
+		power-supply = <&ldo6_reg>;
+		parade,regs = /bits/ 8 <
+			0x02 0xa1 0x01 /* HPD low */
+			/*
+			 * SW setting: [1:0] SW output 1.2V voltage is
+			 * lower to 96%
+			 */
+			0x04 0x14 0x01
+			/* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
+			0x04 0xe3 0x20
+			0x04 0xe2 0x80 /* [7] RCO SS enable */
+			/*
+			 * RPHY Setting: [3:2] CDR tune wait cycle before
+			 * measure for fine tune b00: 1us,
+			 * 01: 0.5us, 10:2us, 11:4us
+			 */
+			0x04 0x8a 0x0c
+			0x04 0x89 0x08 /* [3] RFD always on */
+			/*
+			 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
+			 */
+			0x04 0x71 0x2d
+			/* 2.7G CDR settings */
+			0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
+			0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
+			0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
+			/*
+			 * 1.62G CDR settings:
+			 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
+			 */
+			0x04 0xc0 0x12
+			0x04 0xc1 0x92 /* Gitune=-37% */
+			0x04 0xc2 0x1c /* Fbstep=100% */
+			0x04 0x32 0x80 /* [7] LOS signal disable */
+			/* RPIO Setting */
+			/* [7:4] LVDS driver bias current 75% (250mV swing) */
+			0x04 0x00 0xb0
+			 /* [7:6] Right-bar GPIO output strength is 8mA */
+			0x04 0x15 0x40
+			/* EQ Training State Machine Setting */
+			0x04 0x54 0x10 /* RCO calibration start */
+			/* [4:0] MAX_LANE_COUNT set to one lane */
+			0x01 0x02 0x81
+			/* [4:0] LANE_COUNT_SET set to one lane */
+			0x01 0x21 0x81
+			0x00 0x52 0x20
+			0x00 0xf1 0x03 /* HPD CP toggle enable */
+			0x00 0x62 0x41
+			/* Counter number add 1ms counter delay */
+			0x00 0xf6 0x01
+			/*
+			 * [6]PWM function control by DPCD0040f[7], default
+			 * is PWM block always works
+			 */
+			0x00 0x77 0x06
+			0x00 0x4c 0x04
+			/*
+			 * 04h Adjust VTotal tolerance to fix the 30Hz no-
+			 * display issue
+			 * DPCD00400='h00 Parade OUI = 'h001cf8
+			 */
+			0x01 0xc0 0x00
+			0x01 0xc1 0x1c /* DPCD00401='h1c */
+			0x01 0xc2 0xf8 /* DPCD00402='hf8 */
+			/* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
+			0x01 0xc3 0x44
+			0x01 0xc4 0x32 /* DPCD404 */
+			0x01 0xc5 0x53 /* DPCD405 */
+			0x01 0xc6 0x4c /* DPCD406 */
+			0x01 0xc7 0x56 /* DPCD407 */
+			0x01 0xc8 0x35 /* DPCD408 */
+			/* DPCD40A Initial Code major revision '01' */
+			0x01 0xca 0x01
+			/* DPCD40B Initial Code minor revision '05' */
+			0x01 0xcb 0x05
+			0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
+			/*
+			 * 0xff for 100% PWM of brightness, 0h for 0% brightness
+			 */
+			0x01 0xa7 0x00
+			/*
+			 * Set LVDS output as 6bit-VESA mapping, single LVDS
+			 * channel
+			 */
+			0x01 0xcc 0x13
+			0x02 0xb1 0x20 /* Enable SSC set by register */
+			/* Set SSC enabled and +/-1% central spreading */
+			0x04 0x10 0x16
+			0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
+			0x04 0x54 0x14 /* LC -> RCO */
+			0x02 0xa1 0x91>; /* HPD high */
+	};
+
+	soundcodec@20 {
+		reg = <0x20>;
+		compatible = "maxim,max98088-codec";
+	};
+};
+
+#include "cros-ec-keyboard.dtsi"
diff --git a/board/samsung/smdk5250/Kconfig b/board/samsung/smdk5250/Kconfig
index 698ee9125c92716fd32a52c4fceabc62b0f758b9..11ffaee5ce1732f472eafb939d37cdc102856692 100644
--- a/board/samsung/smdk5250/Kconfig
+++ b/board/samsung/smdk5250/Kconfig
@@ -23,3 +23,16 @@ config SYS_CONFIG_NAME
 	default "snow"
 
 endif
+
+if TARGET_SPRING
+
+config SYS_BOARD
+	default "smdk5250"
+
+config SYS_VENDOR
+	default "samsung"
+
+config SYS_CONFIG_NAME
+	default "spring"
+
+endif
diff --git a/board/samsung/smdk5250/MAINTAINERS b/board/samsung/smdk5250/MAINTAINERS
index 070593e266ea83cda6f8cb629cc25a9257ef3f31..cde966fdbf9c864c1a49f601da7be5fa1c827cca 100644
--- a/board/samsung/smdk5250/MAINTAINERS
+++ b/board/samsung/smdk5250/MAINTAINERS
@@ -10,3 +10,9 @@ M:	Akshay Saraswat <akshay.s@samsung.com>
 S:	Maintained
 F:	include/configs/snow.h
 F:	configs/snow_defconfig
+
+SPRING BOARD
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+F:	include/configs/spring.h
+F:	configs/spring_defconfig
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
new file mode 100644
index 0000000000000000000000000000000000000000..a3abb35470381b2a25adf2b5aa5a2e8f7ffc2160
--- /dev/null
+++ b/configs/spring_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_TARGET_SPRING=y
+CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_SOUND=y
+CONFIG_SPI_FLASH=y
+CONFIG_CMD_CROS_EC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_SOUND=y
+CONFIG_I2S=y
+CONFIG_I2S_SAMSUNG=y
+CONFIG_SOUND_MAX98095=y
+CONFIG_SOUND_WM8994=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_I2C=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_PMIC_TPS65090=y
+CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_I2C_MUX=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_ERRNO_STR=y
+CONFIG_DM_PMIC_MAX77686=y
+CONFIG_DM_REGULATOR_MAX77686=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_S5P=y
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BASE=0x12c30000
+CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_PMIC_S5M8767=y
+CONFIG_REGULATOR_S5M8767=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
diff --git a/include/configs/spring.h b/include/configs/spring.h
new file mode 100644
index 0000000000000000000000000000000000000000..a692dfd7ec766f2995ca3be040e266409765090a
--- /dev/null
+++ b/include/configs/spring.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_SPRING_H
+#define __CONFIG_SPRING_H
+
+#include <configs/exynos5250-common.h>
+#include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
+
+#define CONFIG_BOARD_COMMON
+
+#define CONFIG_SYS_PROMPT		"spring # "
+#define CONFIG_IDENT_STRING		" for spring"
+#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
+
+#endif	/* __CONFIG_SPRING_H */