diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 0cc6fd716e5763455422af6f2527910193af853d..cf079b9cd4cf61d018e671636c4d8e876847161d 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -175,6 +175,19 @@
"gpio_range4",
"gpio_range5";
ngpios = <200>;
+ socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
+ <21 217 3>;
+ };
+
+ adamv@57920000 {
+ compatible = "socionext,uniphier-ld11-adamv",
+ "simple-mfd", "syscon";
+ reg = <0x57920000 0x1000>;
+
+ adamv_rst: reset {
+ compatible = "socionext,uniphier-ld11-adamv-reset";
+ #reset-cells = <1>;
+ };
};
i2c0: i2c@58780000 {
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index a7fdaa74d1553fa349ca058f31342bcae6f1e5b9..68f0292ec7354d08135c0a68810780e195f34b33 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -223,6 +223,36 @@
clock-frequency = <58820000>;
};
+ gpio: gpio@55000000 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000000 0x200>;
+ interrupt-parent = <&aidet>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 0 0>,
+ <&pinctrl 96 0 0>,
+ <&pinctrl 160 0 0>;
+ gpio-ranges-group-names = "gpio_range0",
+ "gpio_range1",
+ "gpio_range2";
+ ngpios = <205>;
+ socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
+ <21 217 3>;
+ };
+
+ adamv@57920000 {
+ compatible = "socionext,uniphier-ld20-adamv",
+ "simple-mfd", "syscon";
+ reg = <0x57920000 0x1000>;
+
+ adamv_rst: reset {
+ compatible = "socionext,uniphier-ld20-adamv-reset";
+ #reset-cells = <1>;
+ };
+ };
+
i2c0: i2c@58780000 {
compatible = "socionext,uniphier-fi2c";
status = "disabled";
diff --git a/arch/arm/dts/uniphier-ld4-ref.dts b/arch/arm/dts/uniphier-ld4-ref.dts
index 0f50acb24c2c2474f334d18520111bf49ecae7e8..fb94df42d7245a86fb667482579aa731115d2374 100644
--- a/arch/arm/dts/uniphier-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ld4-ref.dts
@@ -69,11 +69,6 @@
status = "okay";
};
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
+&nand {
+ status = "okay";
};
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index b81603820a828c02ddb9979fd96efebb6af6b221..158beae718e03d70e7db2f0e365630e17e0b22f1 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -50,7 +50,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -295,11 +294,9 @@
compatible = "socionext,uniphier-ld4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld4-pinctrl";
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/uniphier-ld6b-ref.dts b/arch/arm/dts/uniphier-ld6b-ref.dts
index bdb7f50ab3a045e105e72baa07ff5c597b48f0a0..9b136b8603df11553756ef47f9bac87f79aaf0a6 100644
--- a/arch/arm/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/dts/uniphier-ld6b-ref.dts
@@ -71,11 +71,6 @@
status = "okay";
};
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
+&nand {
+ status = "okay";
};
diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi
index d5e8aafccbd63df13f2339cc4bc0059cf782d7a4..a1b9a6c76246ea024e256a65c964067aff05138e 100644
--- a/arch/arm/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/dts/uniphier-pinctrl.dtsi
@@ -23,6 +23,21 @@
function = "emmc";
};
+ pinctrl_ether_mii: ether_mii_grp {
+ groups = "ether_mii";
+ function = "ether_mii";
+ };
+
+ pinctrl_ether_rgmii: ether_rgmii_grp {
+ groups = "ether_rgmii";
+ function = "ether_rgmii";
+ };
+
+ pinctrl_ether_rmii: ether_rmii_grp {
+ groups = "ether_rmii";
+ function = "ether_rmii";
+ };
+
pinctrl_i2c0: i2c0_grp {
groups = "i2c0";
function = "i2c0";
diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts
index 8161ba83a0478db1b2d7c30232899ea1a5142899..60a8c337677b442e7df5133234bdea1f5ad84a7b 100644
--- a/arch/arm/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-pro4-ace.dts
@@ -90,12 +90,3 @@
&usb3 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts
index 360b31d6927a8994a5bd7aac0334daa026245ead..1b22f80e2ce3b84af5b86e1c3a16fa25306eef18 100644
--- a/arch/arm/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-pro4-ref.dts
@@ -83,12 +83,3 @@
&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts b/arch/arm/dts/uniphier-pro4-sanji.dts
index 778e2bb4b78dc75a4c0cf1a74b70bfef26992bd5..950f47abf8165a9db3443b12b7bf7e37c6806a6d 100644
--- a/arch/arm/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-pro4-sanji.dts
@@ -85,24 +85,3 @@
&usb3 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&mio_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 5f39972f67e9d3b11b3c6217696a8c46922c051c..ea97e26c25e93f97d6b32942fe588189d54818bd 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -58,7 +58,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -224,7 +223,6 @@
compatible = "socionext,uniphier-pro4-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- u-boot,dm-pre-reloc;
mio_clk: clock {
compatible = "socionext,uniphier-pro4-mio-clock";
@@ -333,11 +331,9 @@
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro4-pinctrl";
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/uniphier-pro5-4kbox.dts b/arch/arm/dts/uniphier-pro5-4kbox.dts
index 05597d385edc8a786681b4dac9d8a083cac8469c..1986a0be4b6d4ea7e5b1f08568d04c59e81a48d7 100644
--- a/arch/arm/dts/uniphier-pro5-4kbox.dts
+++ b/arch/arm/dts/uniphier-pro5-4kbox.dts
@@ -55,12 +55,3 @@
&sd {
status = "okay";
};
-
-/* for U-Boot only */
-&serial1 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart1 {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 950b02c5b0d78d9f842eaddaa0cc1657b2d2ede7..3be3acf51edaf41e9038793eaba8b314dfaa7c2c 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -132,7 +132,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -311,7 +310,6 @@
compatible = "socionext,uniphier-pro5-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
- u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pro5-sd-clock";
@@ -344,11 +342,9 @@
compatible = "socionext,uniphier-pro5-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro5-pinctrl";
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts
index 7f0f972bde4f307c5e19df8173d50181131f88a4..4397714e49367773b0965d46fd377db4d7097f0f 100644
--- a/arch/arm/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
@@ -66,24 +66,3 @@
&usb1 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial2 {
- u-boot,dm-pre-reloc;
-};
-
-&sd_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pxs2-vodka.dts b/arch/arm/dts/uniphier-pxs2-vodka.dts
index ec9ffb7df8b188540db902a60ec3d40900890d22..d29096fc1902434efdbc924730989d883c3333e4 100644
--- a/arch/arm/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/dts/uniphier-pxs2-vodka.dts
@@ -49,24 +49,3 @@
&usb0 {
status = "okay";
};
-
-/* for U-Boot only */
-&serial2 {
- u-boot,dm-pre-reloc;
-};
-
-&sd_clk {
- u-boot,dm-pre-reloc;
-};
-
-&emmc {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart2 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_emmc {
- u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index ac84d15560bd4e6e4a7160216a0d1dfafb649a92..dcb251597f9a43f6739fa097fc403b391050341a 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -120,7 +120,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -297,7 +296,6 @@
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
- u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";
@@ -365,11 +363,9 @@
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts
index 1118dd7c6ea56efea610b2a4ba031e909f1d71e0..27de84dabff01e3cac47178409c16ce491b829a3 100644
--- a/arch/arm/dts/uniphier-pxs3-ref.dts
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -68,3 +68,7 @@
&usb1 {
status = "okay";
};
+
+&nand {
+ status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-sld8-ref.dts b/arch/arm/dts/uniphier-sld8-ref.dts
index 3557bb7fed57d839253bef7c20ddfd9a5678f5f6..c94f0af65a45933a9be75de6793f7965308cc80d 100644
--- a/arch/arm/dts/uniphier-sld8-ref.dts
+++ b/arch/arm/dts/uniphier-sld8-ref.dts
@@ -73,11 +73,6 @@
status = "okay";
};
-/* for U-Boot only */
-&serial0 {
- u-boot,dm-pre-reloc;
-};
-
-&pinctrl_uart0 {
- u-boot,dm-pre-reloc;
+&nand {
+ status = "okay";
};
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index 70a5ea454cc83a21626bbc12a1109bfc5dd002da..a3693b0c1f7c08e9323267aa4dee7fb161ce55c6 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -50,7 +50,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -299,11 +298,9 @@
compatible = "socionext,uniphier-sld8-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-sld8-pinctrl";
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..4a0c9c088a6bc4f043376e80652831bcc0a94501
--- /dev/null
+++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi
@@ -0,0 +1,61 @@
+/ {
+ soc {
+ u-boot,dm-pre-reloc;
+
+ serial@54006800 {
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@54006900 {
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@54006a00 {
+ u-boot,dm-pre-reloc;
+ };
+
+ mioctrl@59810000 {
+ u-boot,dm-pre-reloc;
+
+ clock {
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ sdctrl@59810000 {
+ u-boot,dm-pre-reloc;
+
+ clock {
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ soc-glue@5f800000 {
+ u-boot,dm-pre-reloc;
+
+ pinctrl {
+ u-boot,dm-pre-reloc;
+
+ emmc_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart0_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart1_grp {
+ u-boot,dm-pre-reloc;
+ };
+
+ uart2_grp {
+ u-boot,dm-pre-reloc;
+ };
+ };
+ };
+ };
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index de3bdc0bc2fc4a0d8e7db61458f59ebcdf3c41c9..cc759b3e01dc0cc41bddcd19f7bc063caa9aeb3d 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -117,4 +117,6 @@ config CMD_DDRMPHY_DUMP
The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
training; it is useful for the evaluation of DDR Multi PHY training.
+config SYS_SOC
+ default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI
endif
diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c
index def87c1aac2cdfffee340a435de0952e76bb1a5d..64fa12ea5eae6e0a719eb44c5fac6b33c5016e01 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld4.c
@@ -17,9 +17,6 @@ void uniphier_ld4_clk_init(void)
/* deassert reset */
tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
@@ -28,9 +25,6 @@ void uniphier_ld4_clk_init(void)
/* provide clocks */
tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c
index 8a978d20ffa65da7d635ac22357b516ff911e1c5..09c03cd9f50bd8fb97950a0b529f5bc60e6cd07f 100644
--- a/arch/arm/mach-uniphier/clk/clk-pro4.c
+++ b/arch/arm/mach-uniphier/clk/clk-pro4.c
@@ -21,9 +21,6 @@ void uniphier_pro4_clk_init(void)
tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
SC_RSTCTRL_NRST_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
@@ -43,9 +40,6 @@ void uniphier_pro4_clk_init(void)
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c
index 9775127650a72e8c56fc9fa2cf7af243b8ed9406..27fb2f44b4e3bed390cdd8a38c42ba58567f00f6 100644
--- a/arch/arm/mach-uniphier/clk/clk-pxs2.c
+++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c
@@ -19,9 +19,6 @@ void uniphier_pxs2_clk_init(void)
#ifdef CONFIG_USB_DWC3_UNIPHIER
tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_RSTCTRL_NRST_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
@@ -45,9 +42,6 @@ void uniphier_pxs2_clk_init(void)
tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_UNIPHIER_ETH
- tmp |= SC_CLKCTRL_CEN_ETHER;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-training.c b/arch/arm/mach-uniphier/dram/ddrphy-training.c
index fa29a430625a75beacd0a82a05b76cf1f9c661fe..6efdd43b3773e43fc6e5491674df5173d23712c9 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-training.c
+++ b/arch/arm/mach-uniphier/dram/ddrphy-training.c
@@ -5,9 +5,13 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/printk.h>
+#include <time.h>
#include "ddrphy-init.h"
#include "ddrphy-regs.h"
@@ -108,7 +112,7 @@ int ddrphy_training(void __iomem *phy_base)
u32 init_flag = PHY_PIR_INIT;
u32 done_flag = PHY_PGSR0_IDONE;
int timeout = 50000; /* 50 msec is long enough */
-#ifdef DISPLAY_ELAPSED_TIME
+#ifdef DEBUG
ulong start = get_timer(0);
#endif
@@ -121,8 +125,7 @@ int ddrphy_training(void __iomem *phy_base)
do {
if (--timeout < 0) {
- printf("%s: error: timeout during DDR training\n",
- __func__);
+ pr_err("timeout during DDR training\n");
return -ETIMEDOUT;
}
udelay(1);
@@ -131,14 +134,13 @@ int ddrphy_training(void __iomem *phy_base)
for (i = 0; i < ARRAY_SIZE(init_sequence); i++) {
if (pgsr0 & init_sequence[i].err_flag) {
- printf("%s: error: %s failed\n", __func__,
- init_sequence[i].description);
+ pr_err("%s failed\n", init_sequence[i].description);
return -EIO;
}
}
-#ifdef DISPLAY_ELAPSED_TIME
- printf("%s: info: elapsed time %ld msec\n", get_timer(start));
+#ifdef DEBUG
+ pr_debug("DDR training: elapsed time %ld msec\n", get_timer(start));
#endif
return 0;
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 5c1d3436912ecbbb6233402bf4689d88b75f389a..b4b54c06bdb71482621d7662643ad45d196ac020 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -49,7 +49,9 @@ CONFIG_SMC911X_BASE=0x0
CONFIG_SMC911X_32_BIT=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_UNIPHIER=y
CONFIG_USB_STORAGE=y
diff --git a/doc/README.uniphier b/doc/README.uniphier
index e4fd9a3e3fc98c5d1061b309a11dd26ff187cd10..0fa3248fae782ee5c303e538c78a8cfd25858678 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@@ -107,6 +107,231 @@ Firmware.
[ARM Trusted Firmware]: https://github.com/ARM-software/arm-trusted-firmware
+Verified Boot
+-------------
+
+U-Boot supports an image verification method called "Verified Boot".
+This is a brief tutorial to utilize this feature for the UniPhier platform.
+You will find details documents in the doc/uImage.FIT directory.
+
+Here, we take LD20 reference board for example, but it should work for any
+other boards including 32 bit SoCs.
+
+1. Generate key to sign with
+
+ $ mkdir keys
+ $ openssl genpkey -algorithm RSA -out keys/dev.key \
+ -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
+ $ openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+
+Two files "dev.key" and "dev.crt" will be created. The base name is arbitrary,
+but need to match to the "key-name-hint" property described below.
+
+2. Describe FIT source
+
+You need to write an FIT (Flattened Image Tree) source file to describe the
+structure of the image container.
+
+The following is an example for a simple usecase:
+
+---------------------------------------->8----------------------------------------
+/dts-v1/;
+
+/ {
+ description = "Kernel, DTB and Ramdisk for UniPhier LD20 Reference Board";
+ #address-cells = <1>;
+
+ images {
+ kernel@0 {
+ description = "linux";
+ data = /incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/Image.gz");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "gzip";
+ load = <0x82080000>;
+ entry = <0x82080000>;
+ hash@0 {
+ algo = "sha256";
+ };
+ };
+
+ fdt@0 {
+ description = "fdt";
+ data = /incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ hash@0 {
+ algo = "sha256";
+ };
+ };
+
+ ramdisk@0 {
+ description = "ramdisk";
+ data = /incbin/("PATH/TO/YOUR/ROOTFS/DIR/rootfs.cpio");
+ type = "ramdisk";
+ arch = "arm64";
+ os = "linux";
+ compression = "none";
+ hash@0 {
+ algo = "sha256";
+ };
+ };
+ };
+
+ configurations {
+ default = "config@0";
+
+ config@0 {
+ description = "Configuration0";
+ kernel = "kernel@0";
+ fdt = "fdt@0";
+ ramdisk = "ramdisk@0";
+ signature@0 {
+ algo = "sha256,rsa2048";
+ key-name-hint = "dev";
+ sign-images = "kernel", "fdt", "ramdisk";
+ };
+ };
+ };
+};
+---------------------------------------->8----------------------------------------
+
+You need to change the three '/incbin/' lines, depending on the location of
+your kernel image, device tree blob, and init ramdisk. The "load" and "entry"
+properties also need to be adjusted if you want to change the physical placement
+of the kernel.
+
+The "key-name-hint" must specify the key name you have created in the step 1.
+
+The FIT file name is arbitrary. Let's say you saved it into "fit.its".
+
+3. Compile U-Boot with FIT and signature enabled
+
+To use the Verified Boot, you need to enable the following two options:
+ CONFIG_FIT
+ CONFIG_FIT_SIGNATURE
+
+They are disabled by default for UniPhier defconfig files. So, you need to
+tweak the configuration from "make menuconfig" or friends.
+
+ $ make uniphier_v8_defconfig
+ $ make menuconfig
+ [ enable CONFIG_FIT and CONFIG_FIT_SIGNATURE ]
+ $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+4. Build the image tree blob
+
+After building U-Boot, you will see tools/mkimage. With this tool, you can
+create an image tree blob as follows:
+
+ $ tools/mkimage -f fit.its -k keys -K dts/dt.dtb -r -F fitImage
+
+The -k option must specify the key directory you have created in step 1.
+
+A file "fitImage" will be created. This includes kernel, DTB, Init-ramdisk,
+hash data for each of the three, and signature data.
+
+The public key needed for the run-time verification is stored in "dts/dt.dtb".
+
+5. Compile U-Boot again
+
+Since the "dt.dtb" has been updated in step 4, you need to re-compile the
+U-Boot.
+
+ $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+The re-compiled "u-boot.bin" is appended with DTB that contains the public key.
+
+6. Flash the image
+
+Flash the "fitImage" to a storage device (NAND, eMMC, or whatever) on your
+board.
+
+Please note the "u-boot.bin" must be signed, and verified by someone when it is
+loaded. For ARMv8 SoCs, the "someone" is generally ARM Trusted Firmware BL2.
+ARM Trusted Firmware supports an image authentication mechanism called Trusted
+Board Boot (TBB). The verification process must be chained from the moment of
+the system reset. If the Chain of Trust has a breakage somewhere, the verified
+boot process is entirely pointless.
+
+7. Boot verified kernel
+
+Load the fitImage to memory and run the following from the U-Boot command line.
+
+ > bootm <addr>
+
+Here, <addr> is the base address of the fitImage.
+
+If it is successful, you will see messages like follows:
+
+---------------------------------------->8----------------------------------------
+## Loading kernel from FIT Image at 84100000 ...
+ Using 'config@0' configuration
+ Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
+ Trying 'kernel@0' kernel subimage
+ Description: linux
+ Created: 2017-10-20 14:32:29 UTC
+ Type: Kernel Image
+ Compression: gzip compressed
+ Data Start: 0x841000c8
+ Data Size: 6957818 Bytes = 6.6 MiB
+ Architecture: AArch64
+ OS: Linux
+ Load Address: 0x82080000
+ Entry Point: 0x82080000
+ Hash algo: sha256
+ Hash value: 82a37b7f11ae55f4e07aa25bf77e4067cb9dc1014d52d6cd4d588f92eee3aaad
+ Verifying Hash Integrity ... sha256+ OK
+## Loading ramdisk from FIT Image at 84100000 ...
+ Using 'config@0' configuration
+ Trying 'ramdisk@0' ramdisk subimage
+ Description: ramdisk
+ Created: 2017-10-20 14:32:29 UTC
+ Type: RAMDisk Image
+ Compression: uncompressed
+ Data Start: 0x847a5cc0
+ Data Size: 5264365 Bytes = 5 MiB
+ Architecture: AArch64
+ OS: Linux
+ Load Address: unavailable
+ Entry Point: unavailable
+ Hash algo: sha256
+ Hash value: 44980a2874154a2e31ed59222c9f8ea968867637f35c81e4107a984de7014deb
+ Verifying Hash Integrity ... sha256+ OK
+## Loading fdt from FIT Image at 84100000 ...
+ Using 'config@0' configuration
+ Trying 'fdt@0' fdt subimage
+ Description: fdt
+ Created: 2017-10-20 14:32:29 UTC
+ Type: Flat Device Tree
+ Compression: uncompressed
+ Data Start: 0x847a2cb0
+ Data Size: 12111 Bytes = 11.8 KiB
+ Architecture: AArch64
+ Hash algo: sha256
+ Hash value: c517099db537f6d325e6be46b25c871a41331ad5af0283883fd29d40bfc14e1d
+ Verifying Hash Integrity ... sha256+ OK
+ Booting using the fdt blob at 0x847a2cb0
+ Uncompressing Kernel Image ... OK
+ reserving fdt memory region: addr=80000000 size=2000000
+ Loading Device Tree to 000000009fffa000, end 000000009fffff4e ... OK
+
+Starting kernel ...
+---------------------------------------->8----------------------------------------
+
+Please pay attention to the lines that start with "Verifying Hash Integrity".
+
+"Verifying Hash Integrity ... sha256,rsa2048:dev+ OK" means the signature check
+passed.
+
+"Verifying Hash Integrity ... sha256+ OK" (3 times) means the hash check passed
+for kernel, DTB, and Init ramdisk.
+
+If they are not displayed, the Verified Boot is not working.
+
+
UniPhier specific commands
--------------------------
@@ -179,4 +404,4 @@ newer SoCs. Even if it is, EA[25] is not connected on most of the boards.
--
Masahiro Yamada <yamada.masahiro@socionext.com>
-Sep. 2017
+Oct. 2017
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 515024c98e2df499d15dc1acf8b52c7f401b5906..6f4d67ea8af246e2d387d7bf596421d988784f15 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -97,6 +97,7 @@
#define CONFIG_LOADADDR 0x84000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#define CONFIG_CMDLINE_EDITING /* add command line history */
@@ -190,7 +191,6 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
- "verify=n\0" \
"initrd_high=0xffffffffffffffff\0" \
"nor_base=0x42000000\0" \
"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \