diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index 5933a406cb05191380a8519be8a1fa8e51b4d465..9ac48a168321751b70c4fd245f0c33b69f261455 100644
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -82,8 +82,10 @@
 
 &qspi {
 	status = "okay";
+	u-boot,dm-pre-reloc;
 
 	flash0: n25q00@0 {
+		u-boot,dm-pre-reloc;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "n25q00";
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index a202709d6030b06760669115b4aba931fa810988..da134354d188f6c5e62f4f957a254cf0814efb40 100644
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -84,8 +84,10 @@
 
 &qspi {
 	status = "okay";
+	u-boot,dm-pre-reloc;
 
 	flash0: n25q00@0 {
+		u-boot,dm-pre-reloc;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "n25q00";
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 9b43b92f5bcd5faba60f691dc1cced2321b69593..ce3ff0acc4d38f558b21b49fc8b23463630b988d 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id)
 	socfpga_per_reset(reset, 0);
 }
 
-int cpu_eth_init(bd_t *bis)
+static int socfpga_eth_reset(void)
 {
 	const void *fdt = gd->fdt_blob;
 	struct fdtdec_phandle_args args;
@@ -137,6 +137,11 @@ int cpu_eth_init(bd_t *bis)
 
 	return 0;
 }
+#else
+static int socfpga_eth_reset(void)
+{
+	return 0
+};
 #endif
 
 struct {
@@ -232,7 +237,7 @@ int arch_misc_init(void)
 	setenv("bootmode", bsel_str[bsel].mode);
 	if (fpga_id >= 0)
 		setenv("fpgatype", socfpga_fpga_model[fpga_id].var);
-	return 0;
+	return socfpga_eth_reset();
 }
 #endif
 
diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh
index 1adfbf7384cb988ba7b13bb2d12450ceec63e785..050d6baa94ff6f19e4cd64d56c9d5b86ca13d103 100755
--- a/arch/arm/mach-socfpga/qts-filter.sh
+++ b/arch/arm/mach-socfpga/qts-filter.sh
@@ -187,13 +187,13 @@ usage() {
 	echo "$0 [soc_type] [input_qts_dir] [input_bsp_dir] [output_dir]"
 	echo "Process QTS-generated headers into U-Boot compatible ones."
 	echo ""
-	echo -e "  soc_type\t-\tType of SoC, either 'cyclone5' or 'arria5'."
-	echo -e "  input_qts_dir\t-\tDirectory with compiled Quartus project"
-	echo -e "\t\t\t\tand containing the Quartus project file (QPF)."
-	echo -e "  input_bsp_dir\t-\tDirectory with generated bsp containing"
-	echo -e "\t\t\t\tthe settings.bsp file."
-	echo -e "  output_dir\t-\tDirectory to store the U-Boot compatible"
-	echo -e "\t\t\t\theaders."
+	echo "  soc_type      - Type of SoC, either 'cyclone5' or 'arria5'."
+	echo "  input_qts_dir - Directory with compiled Quartus project"
+	echo "                  and containing the Quartus project file (QPF)."
+	echo "  input_bsp_dir - Directory with generated bsp containing"
+	echo "                  the settings.bsp file."
+	echo "  output_dir    - Directory to store the U-Boot compatible"
+	echo "                  headers."
 	echo ""
 }
 
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 8de0ab90469d6e35952cefef8fb59cea01affb09..0501bd110a9a3527eacaad0ac345f599effe3821 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -30,6 +30,9 @@
 
 #define CONFIG_TIMESTAMP		/* Print image info with timestamp */
 
+/* add target to build it automatically upon "make" */
+#define CONFIG_BUILD_TARGET		"u-boot-with-spl.sfp"
+
 /*
  * Memory configurations
  */