From c9d834b2564eb27a4a442b186912bfbd56ec64ce Mon Sep 17 00:00:00 2001
From: Troy Kisky <troy.kisky@boundarydevices.com>
Date: Fri, 2 Mar 2018 10:31:58 -0800
Subject: [PATCH] ipu_common: align workaround with current ENGcm08316
06/2010 errata saw a "Added HSC bypass clarification ENGcm08316"
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
drivers/video/ipu_common.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 1e24c218301..8e503f37ab9 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -461,19 +461,14 @@ int ipu_probe(void)
{
unsigned long ipu_base;
#if defined CONFIG_MX51
- u32 temp;
-
+ /* Errata ENGcm08316 */
u32 *reg_hsc_mcd = (u32 *)MIPI_HSC_BASE_ADDR;
+ u32 *reg_hsc_mccmc = (u32 *)(MIPI_HSC_BASE_ADDR + 0x0d8);
u32 *reg_hsc_mxt_conf = (u32 *)(MIPI_HSC_BASE_ADDR + 0x800);
- __raw_writel(0xF00, reg_hsc_mcd);
-
- /* CSI mode reserved*/
- temp = __raw_readl(reg_hsc_mxt_conf);
- __raw_writel(temp | 0x0FF, reg_hsc_mxt_conf);
-
- temp = __raw_readl(reg_hsc_mxt_conf);
- __raw_writel(temp | 0x10000, reg_hsc_mxt_conf);
+ __raw_writel(0xF00, reg_hsc_mcd);
+ __raw_writel(0x00c, reg_hsc_mccmc);
+ __raw_writel(0xf003008b, reg_hsc_mxt_conf);
#endif
ipu_base = IPU_CTRL_BASE_ADDR;
--
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