From c1824ea268b1a565fd6956d79a91e4460d88a88b Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 28 Aug 2013 08:26:41 +0200
Subject: [PATCH] arm: zynq: Do not remap OCM to high address
In case where ps-ddr is not used, do not remap
OCM to high address and keep it from 0x0.
Linux SMP requires to have memory at 0x0.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/cpu/armv7/zynq/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c
index 2bb38438ae4..0ca5d8a97a0 100644
--- a/arch/arm/cpu/armv7/zynq/cpu.c
+++ b/arch/arm/cpu/armv7/zynq/cpu.c
@@ -16,13 +16,15 @@ void lowlevel_init(void)
int arch_cpu_init(void)
{
zynq_slcr_unlock();
- /* remap DDR to zero, FILTERSTART */
- writel(0, &scu_base->filter_start);
/* Device config APB, unlock the PCAP */
writel(0x757BDF0D, &devcfg_base->unlock);
writel(0xFFFFFFFF, &devcfg_base->rom_shadow);
+#if (CONFIG_SYS_SDRAM_BASE == 0)
+ /* remap DDR to zero, FILTERSTART */
+ writel(0, &scu_base->filter_start);
+
/* OCM_CFG, Mask out the ROM, map ram into upper addresses */
writel(0x1F, &slcr_base->ocm_cfg);
/* FPGA_RST_CTRL, clear resets on AXI fabric ports */
@@ -33,6 +35,7 @@ int arch_cpu_init(void)
writel(0x0, &slcr_base->ddr_urgent_sel);
/* Urgent write, ports S2/S3 */
writel(0xC, &slcr_base->ddr_urgent);
+#endif
zynq_slcr_lock();
--
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