diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 67e81c0574d5ef94accf5c86abd379e803fae908..f15b0a8c9e5cc3c910a75acfa29282bd8322b1e7 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -85,7 +85,8 @@ int checkcpu (void) struct cpu_type *cpu; #ifdef CONFIG_DDR_CLK_FREQ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) + >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; #else u32 ddr_ratio = 0; #endif diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 1cda1e34ebf78c1d9ac2c1663ba1892a7c4aed86..485ba20fd76e5e6b179e34cc3332281693b6681a 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -54,7 +54,8 @@ void get_sys_info (sys_info_t * sysInfo) #ifdef CONFIG_DDR_CLK_FREQ { - u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) + >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; if (ddr_ratio != 0x7) sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ; } diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 559d6ea6caab83b03f145084c0e225a53603d420..50c9ddefd22d9bb7a762145ce15c5a1a082deacd 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1552,6 +1552,13 @@ typedef struct par_io { */ typedef struct ccsr_gur { uint porpllsr; /* 0xe0000 - POR PLL ratio status register */ +#ifdef CONFIG_MPC8536 +#define MPC85xx_PORPLLSR_DDR_RATIO 0x3e000000 +#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 25 +#else +#define MPC85xx_PORPLLSR_DDR_RATIO 0x00003e00 +#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 9 +#endif uint porbmsr; /* 0xe0004 - POR boot mode status register */ #define MPC85xx_PORBMSR_HA 0x00070000 uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 2578bef2781d4f0dfe5d65e6aa2d014ebfd70dab..0d65b206ba0d803b683fcad382290928e3774e24 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -59,7 +59,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); extern unsigned long get_board_ddr_clk(unsigned long dummy); #endif #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ -/* #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /\* ddrclk for MPC85xx *\/ FIXME-8536*/ +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ #define CONFIG_GET_CLK_FROM_ICS307 /* decode sysclk and ddrclk freq from ICS307 instead of switches */